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UID:dac_DAC 2026_sess317_RESEARCH935@linklings.com
SUMMARY:SALUT: Efficient Sparse LU Factorization via Asynchronous Task Tri
 ggering on HBM FPGAs
DESCRIPTION:Xin Xu and Zhenhua Wu (Zhejiang University), Dan Niu (Southeas
 t University), and Zhou Jin and Cheng Zhuo (Zhejiang University)\n\nSparse
  LU factorization is a critical kernel in scientific computing. Given its 
 irregular data dependencies and complex computation patterns arising from 
 inherent high sparsity, its acceleration remains largely unexplored on FPG
 As. The high concurrency capability offered by High Bandwidth Memory (HBM)
  has recently presented new opportunities. Nevertheless, accelerating spar
 se LU factorization on HBM-equipped FPGAs remains non-trivial due to rigid
  dependency synchronization and imbalanced load.\n\nIn this paper, we prop
 ose SALUT, a high-performance sparse LU factorization accelerator on HBM F
 PGAs. An asynchronous task activation mechanism is developed to pre-compil
 e complex runtime data dependency resolution into fine-grained dependency 
 management, reducing synchronization overhead and maximizing computation p
 arallelism. Additionally, we design a hardware architecture facilitating s
 tream-aware parallel scheduling by decoupling burdensome dependency resolu
 tion from task activation, eliminating serial bottleneck of a centralized 
 scheduler. Finally, a locality-aware dual-queue load balancing strategy en
 sures data locality and high hardware utilization. Evaluations on 15 spars
 e matrices show that SALUT's geometric mean throughput and energy efficien
 cy surpass the NVIDIA cuDSS solver by 4.0x and 6.5x on RTX A6000 GPU, and 
 3.7x and 4.7x on Tesla V100 GPU, respectively.\n\nTrack: EDA7-II. Physical
  Design and Verification, Design\n\nSession Chairs: Christian Pilato (Poli
 tecnico di Milano); Mohsen Imani (University of California, Irvine); Flavi
 o Ponzina (San Diego State University); Amin Farshidi (Cadence Design Syst
 ems, Inc.); Yonggan Fu (Georgia Institute of Technology, NVIDIA); Dimitrio
 s Tsaras (Huawei, Hong Kong University of Science and Technology (HKUST));
  Anh Nguyen (Fujitsu Limited); Ruiyang Qin (Villanova University); Jiliang
  Zhang (Hunan University); Meng Li (Peking University); and Rassul Bairamk
 ulov (Advanced Micro Devices (AMD))\n\n
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