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UID:dac_DAC 2026_sess317_RESEARCH732@linklings.com
SUMMARY:Unified Rail-Signal Co-Design for Multilayer PCBs: Resource Alloca
 tion, IR-Drop, and Routability
DESCRIPTION:Wei-Kai Huang, Jhih-Jie Lee, and Yao-Wen Chang (National Taiwa
 n University) and Yang Lu, Jerry Bai, and Bin-Chyi Tseng (ASUSTeK Computer
  Inc.)\n\nThe growing demand for high-performance yet energy-efficient sys
 tems has elevated the need for coordinated power and signal routing in mul
 tilayer printed circuit boards (PCBs). While prior work optimizes either t
 he power-delivery network (for DC IR-drop compliance) or signal routing (f
 or routability), these separated flows often induce spatial contention and
  inefficient layer utilization. We propose the first unified rail-signal c
 o-design framework for multilayer PCBs that jointly optimizes routing qual
 ity and power integrity. Our approach (1) generates routing guides to prof
 ile and allocate resources, (2) performs iterative rail-signal co-optimiza
 tion that explicitly models crossing, overflow, and current density, and (
 3) conducts detailed routing via a guided, crossing-aware A* search that a
 ligns with globally optimized guides. Experiments demonstrate that our pro
 posed framework substantially improves routability while satisfying DC IR-
 drop constraints, delivering robust solutions with efficient resource usag
 e.\n\nTrack: EDA7-II. Physical Design and Verification, Design\n\nSession 
 Chairs: Christian Pilato (Politecnico di Milano); Mohsen Imani (University
  of California, Irvine); Flavio Ponzina (San Diego State University); Amin
  Farshidi (Cadence Design Systems, Inc.); Yonggan Fu (Georgia Institute of
  Technology, NVIDIA); Dimitrios Tsaras (Huawei, Hong Kong University of Sc
 ience and Technology (HKUST)); Anh Nguyen (Fujitsu Limited); Ruiyang Qin (
 Villanova University); Jiliang Zhang (Hunan University); Meng Li (Peking U
 niversity); and Rassul Bairamkulov (Advanced Micro Devices (AMD))\n\n
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