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UID:dac_DAC 2026_sess317_RESEARCH3091@linklings.com
SUMMARY:Shared Logic Unleashed: Multiple-Node Boolean Optimization for Nex
 t-Gen Synthesis
DESCRIPTION:Alessandro Tempia Calvino, Anubhaw Xess, Anika Prasad, Jacob M
 inz, Eleonora Testa, and Walter Lau Neto (Synopsys); Alan Mishchenko (Univ
 ersity of California, Berkeley); Giovanni De Micheli (École Polytechnique 
 Fédérale de Lausanne (EPFL)); and Patrick Vuillod and Luca Amaru (Synopsys
 )\n\nWe present a high-effort Boolean optimization framework that restruct
 ures multiple nodes in combinational logic simultaneously, enabling area r
 eductions beyond the reach of conventional single-output transformations. 
 Our method generalizes Boolean resubstitution on both nodes and edges to o
 perate across shared logic while leveraging don't-care conditions. Our app
 roach supports coordinated removal and resynthesis of shared logic regions
  and expands the optimization scope to multiple-output windows. When deplo
 yed in an industrial standard-cell design flow, our framework achieves up 
 to 6.79% area reduction and 7.85% switching power reduction post-synthesis
 . Additionally, it establishes 19 new best results in the EPFL synthesis c
 ompetition on LUT networks.\n\nTrack: EDA7-II. Physical Design and Verific
 ation, Design\n\nSession Chairs: Christian Pilato (Politecnico di Milano);
  Mohsen Imani (University of California, Irvine); Flavio Ponzina (San Dieg
 o State University); Amin Farshidi (Cadence Design Systems, Inc.); Yonggan
  Fu (Georgia Institute of Technology, NVIDIA); Dimitrios Tsaras (Huawei, H
 ong Kong University of Science and Technology (HKUST)); Anh Nguyen (Fujits
 u Limited); Ruiyang Qin (Villanova University); Jiliang Zhang (Hunan Unive
 rsity); Meng Li (Peking University); and Rassul Bairamkulov (Advanced Micr
 o Devices (AMD))\n\n
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