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UID:dac_DAC 2026_sess317_RESEARCH223@linklings.com
SUMMARY:iHyperG: Incremental Hypergraph Partitioning on GPU
DESCRIPTION:Wan Luan Lee and Aditya Das Sarma (University of Wisconsin-Mad
 ison); Che Chang (University of Wisconsin, Madison); and Chih-Chun Chang a
 nd Tsung-Wei Huang (University of Wisconsin-Madison)\n\nRecent advances in
  GPU-accelerated hypergraph partitioning have achieved substantial perform
 ance gains but remain limited to full partitioning. In particular, the lac
 k of support for incrementality is a critical limitation for being used by
  many CAD applications, where circuit hypergraphs iteratively undergo incr
 emental modifications as part of optimization loops. To overcome this limi
 tation, we present iHyperG, the first GPU-parallel incremental k-way hyper
 graph partitioner. iHyperG introduces a scalable delta-based hypergraph da
 ta structure for efficient incremental modifications on a GPU, along with 
 an effective incremental partitioning algorithm that rebalances partitions
  in a single pass and refines only cut-critical vertices. Experimental res
 ults show that iHyperG achieves average speedups of 190x for modification 
 and 83x for partitioning over a state-of-the-art GPU-parallel hypergraph p
 artitioner, while maintaining comparable partitioning quality.\n\nTrack: E
 DA7-II. Physical Design and Verification, Design\n\nSession Chairs: Christ
 ian Pilato (Politecnico di Milano); Mohsen Imani (University of California
 , Irvine); Flavio Ponzina (San Diego State University); Amin Farshidi (Cad
 ence Design Systems, Inc.); Yonggan Fu (Georgia Institute of Technology, N
 VIDIA); Dimitrios Tsaras (Huawei, Hong Kong University of Science and Tech
 nology (HKUST)); Anh Nguyen (Fujitsu Limited); Ruiyang Qin (Villanova Univ
 ersity); Jiliang Zhang (Hunan University); Meng Li (Peking University); an
 d Rassul Bairamkulov (Advanced Micro Devices (AMD))\n\n
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