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UID:dac_DAC 2026_sess317_RESEARCH1569@linklings.com
SUMMARY:FILCO: Flexible Composing Architecture with Real-Time Reconfigurab
 ility for DNN Acceleration
DESCRIPTION:Xingzhen Chen, Jinming Zhuang, Zhuoping Yang, Shixin Ji, and S
 arah Schultz (Brown University); Zheng Dong (Wayne State University); Weis
 ong Shi (University of Delaware); and Peipei Zhou (Brown University)\n\nWi
 th the development of deep neural network (DNN) enabled applications, achi
 eving high hardware resource efficiency on diverse workloads is non-trivia
 l in heterogeneous computing platforms. \nPrior works discuss dedicated ar
 chitectures to achieve maximal resource efficiency. However, a mismatch be
 tween hardware and workloads always exists in various diverse workloads. \
 nOther works discuss overlay architecture that can dynamically switch data
 flow for different workloads. \nHowever, these works are still limited by 
 flexibility granularity and induce much resource inefficiency.\n\nTo solve
  this problem, we propose a flexible composing architecture, FILCO, that c
 an efficiently match diverse workloads to achieve the optimal storage and 
 computation resource efficiency. FILCO can be reconfigured in real-time an
 d flexibly composed into a unified or multiple independent accelerators. W
 e also propose the FILCO framework, including an analytical model with a t
 wo-stage DSE that can achieve the optimal design point. We also evaluate t
 he FILCO framework on the 7nm AMD Versal VCK190 board. Compared with prior
  works, our design can achieve 1.3x - 5x throughput and hardware efficienc
 y on various diverse workloads.\n\nTrack: EDA7-II. Physical Design and Ver
 ification, Design\n\nSession Chairs: Christian Pilato (Politecnico di Mila
 no); Mohsen Imani (University of California, Irvine); Flavio Ponzina (San 
 Diego State University); Amin Farshidi (Cadence Design Systems, Inc.); Yon
 ggan Fu (Georgia Institute of Technology, NVIDIA); Dimitrios Tsaras (Huawe
 i, Hong Kong University of Science and Technology (HKUST)); Anh Nguyen (Fu
 jitsu Limited); Ruiyang Qin (Villanova University); Jiliang Zhang (Hunan U
 niversity); Meng Li (Peking University); and Rassul Bairamkulov (Advanced 
 Micro Devices (AMD))\n\n
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