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UID:dac_DAC 2026_sess317_RESEARCH1473@linklings.com
SUMMARY:GRACE: A Ground Plane Generation and Re-routing Aware Co-design En
 gine
DESCRIPTION:Tongkai Wu, Beichen Li, Yapeng Li, Zuxun Duan, Yanshi Liang, Y
 ihe Wang, and Baohui Xie (The Chinese University of Hong Kong, Shenzhen); 
 Qunsong Ye (Shenzhen index tech.); and Tinghuan Chen (The Chinese Universi
 ty of Hong Kong, Shenzhen)\n\nIn modern high-density Printed Circuit Board
  (PCB) design, the conventional sequential workflow often leads to a fract
 ured ground plane, compromising signal integrity and system performance. E
 xisting Electronic Design Automation (EDA) tools passively fill unoccupied
  space with copper post-routing, lacking the ability to modify wire segmen
 ts to improve ground plane continuity. In this paper, we propose A Ground 
 Plane Generation and Re-routing Aware Co-design Engine, a novel, topology-
 aware framework that fundamentally shifts the paradigm from passive fillin
 g to an integrated co-design process. GRACE formulates ground plane genera
 tion as an optimization problem tightly coupled with automated rerouting. 
 It partitions the layout into copper-pourable regions and blockages, and a
 bstracts this into a novel weighted graph model, the Ground Plane Graph (G
 PGraph). We then formulate an Integer Linear Programming (ILP) problem on 
 the GPGraph to identify a globally optimal set of blockages to eliminate. 
 By strategically rerouting a minimal number of power & signal wire segment
 s, GRACE merges isolated copper islands to create a maximum and contiguous
  ground plane. Experimental results demonstrate that GRACE drastically inc
 reases the area of the ground plane by an average of 33.06% and reduces th
 e number of the ground plane polygons by 54.34% compared to open-source ED
 A tools. Moreover, our method achieves a significant speed-up over manual 
 refinement while attaining an equivalent ground-plane area and number of g
 round plane polygons. To the best of our knowledge, this is the first work
  to automate ground plane unification through an integrated rerouting-awar
 e co-design methodology.\n\nTrack: EDA7-II. Physical Design and Verificati
 on, Design\n\nSession Chairs: Christian Pilato (Politecnico di Milano); Mo
 hsen Imani (University of California, Irvine); Flavio Ponzina (San Diego S
 tate University); Amin Farshidi (Cadence Design Systems, Inc.); Yonggan Fu
  (Georgia Institute of Technology, NVIDIA); Dimitrios Tsaras (Huawei, Hong
  Kong University of Science and Technology (HKUST)); Anh Nguyen (Fujitsu L
 imited); Ruiyang Qin (Villanova University); Jiliang Zhang (Hunan Universi
 ty); Meng Li (Peking University); and Rassul Bairamkulov (Advanced Micro D
 evices (AMD))\n\n
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