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UID:dac_DAC 2026_sess317_RESEARCH068@linklings.com
SUMMARY:A Differentiable Approach to Task Graph Partitioning: A Case Study
  in RTL Simulation
DESCRIPTION:Aditya Das Sarma and Wan Luan Lee (University of Wisconsin-Mad
 ison); Shui Jiang (The Chinese University of Hong Kong); Boyang Zhang (Uni
 versity of Wisconsin, Madison); and Tsung-Wei Huang (University of Wiscons
 in-Madison)\n\nGraph partitioning is essential for many EDA applications t
 hat leverage task graph parallelism for faster execution. For instance, RT
 L simulators partition an input RTL design into dependent tasks and schedu
 le them across threads. However, existing partitioners are largely limited
  to general-purpose heuristics that overlook real threading costs, resulti
 ng in suboptimal performance. Consequently, we introduce DiffPart, a diffe
 rentiable task graph partitioning framework that automatically learns high
 -quality partitions under real operating conditions. Applied to RTL simula
 tion, DiffPart improves state-of-the-art Verilator's partitioning quality,
  delivering up to 1.22--55.25x faster simulation runtime across diverse de
 signs.\n\nTrack: EDA7-II. Physical Design and Verification, Design\n\nSess
 ion Chairs: Christian Pilato (Politecnico di Milano); Mohsen Imani (Univer
 sity of California, Irvine); Flavio Ponzina (San Diego State University); 
 Amin Farshidi (Cadence Design Systems, Inc.); Yonggan Fu (Georgia Institut
 e of Technology, NVIDIA); Dimitrios Tsaras (Huawei, Hong Kong University o
 f Science and Technology (HKUST)); Anh Nguyen (Fujitsu Limited); Ruiyang Q
 in (Villanova University); Jiliang Zhang (Hunan University); Meng Li (Peki
 ng University); and Rassul Bairamkulov (Advanced Micro Devices (AMD))\n\n
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