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UID:dac_DAC 2026_sess315_RESEARCH3145@linklings.com
SUMMARY:STAMP: Semiconductor Tool-chain Attestation through Wafer-Level Ma
 chine Learning-based Process Monitoring
DESCRIPTION:Suraag Sunil Tellakula (The University of Texas at Dallas); Ch
 ing-Yi Chang (University of Texas at Dallas); Matthew Nigh (University of 
 California, San Diego); John Carulli (Advantest); and Yiorgos Makris (Univ
 ersity of California, San Diego)\n\nWe introduce a machine learning approa
 ch for distinguishing between wafers fabricated using a sanctioned/ratifie
 d chain of tools on a semiconductor manufacturing floor and unsanctioned/u
 nratified versions of the tool-chain based on metrology or wafer acceptanc
 e test collected during manufacturing and testing. Our method exploits the
  systematic nature of process variation and captures the subtle causal rel
 ationships between tool exchanges and the resulting changes in physical di
 mensions or electrical characteristics of the silicon, which can then be u
 sed for enabling wafer-level tool-chain attestation. Effectiveness of our 
 solution is demonstrated on a dataset of inline and e-test measurements fr
 om 7000 wafers fabricated with multiple tool-chain variants in the GlobalF
 oundries 12LP FinFET technology node.\n\nTopics: Quantum\n\nTrack: DES6. Q
 uantum Computing, Systems\n\nSession Chairs: Hokeun Kim (Arizona State Uni
 versity); BaekGyu Kim (Daegu Gyeongbuk Institute of Science and Technology
 ); Xiang Chen (Peking University); Sangyeob Kim (Yonsei University); Rober
 t M. Radway (University of Pennsylvania); Prashanth Mohan (University of P
 ittsburgh); Xiaoxuan Yang (University of Virginia, Stanford University); R
 amtin Zand (University of South Carolina); Hadi Kamali (University of Cent
 ral Florida); Jiafeng Xie (Villanova University); Prabuddha Chakraborty (U
 niversity of Maine); Junichiro Kadomoto (University of Tokyo); and Yosuke 
 Ueno (RIKEN)\n\n
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