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UID:dac_DAC 2026_sess315_RESEARCH271@linklings.com
SUMMARY:Learning the "Why": Causal-Aware Learning in Explainable and Effic
 ient CPU Design Optimization
DESCRIPTION:Yiyang Zhao, Tianning Gao, Hongyang Pan, Liangji Wu, Yiming We
 i, Zhaori Bi, Changhao yan, and Xuan Zeng (Fudan University)\n\nAs modern 
 CPUs grow increasingly configurable, design space exploration (DSE) has be
 come essential for navigating complex architectural trade-offs. However, e
 xisting DSE approaches predominantly rely on statistical correlations, res
 ulting in opaque decision processes. They cannot clearly explain the under
 lying causes of how configurations affect PPA outcomes, which in turn redu
 ces designers' confidence in automated recommendations. To address this li
 mitation, we introduce causal learning into the DSE pipeline and develop C
 AL-DSE, a framework that constructs a validated causal graph combining sta
 tistical evidence with LLM-informed domain knowledge. Building on this str
 ucture, the causal graph decomposes the high-dimensional design space, ena
 bling both interpretability and efficient exploration. Experimental result
 s on RISC-V processor show that CAL-DSE achieves up to 4.12× hypervolume i
 mprovement while revealing validated causal pathways between design parame
 ters and PPA outcomes.\n\nTopics: Quantum\n\nTrack: DES6. Quantum Computin
 g, Systems\n\nSession Chairs: Hokeun Kim (Arizona State University); BaekG
 yu Kim (Daegu Gyeongbuk Institute of Science and Technology); Xiang Chen (
 Peking University); Sangyeob Kim (Yonsei University); Robert M. Radway (Un
 iversity of Pennsylvania); Prashanth Mohan (University of Pittsburgh); Xia
 oxuan Yang (University of Virginia, Stanford University); Ramtin Zand (Uni
 versity of South Carolina); Hadi Kamali (University of Central Florida); J
 iafeng Xie (Villanova University); Prabuddha Chakraborty (University of Ma
 ine); Junichiro Kadomoto (University of Tokyo); and Yosuke Ueno (RIKEN)\n\
 n
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