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DTSTART:19700308T020000
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DTSTAMP:20260730T152640Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T175900
DTEND;TZID=America/Los_Angeles:20260728T180000
UID:dac_DAC 2026_sess306_WIP3308@linklings.com
SUMMARY:LSTM-Based Performance Modeling for Enhanced Peak Memory Predictio
 n in Layout Versus Schematic Verification Tools
DESCRIPTION:Norhan Abdelhafez, Ahmed Hosny, Mohamed Abouelyazid, Samar Abd
  El-Hady, Wael ElManhawy, and Samy Nada (Siemens Digital Industries Softwa
 re)\n\nPerformance modeling of software tools is crucial for optimizing re
 sources and costs, yet precise predictions are challenging due to vast con
 figuration spaces and limited data. While machine learning offers solution
 s, it demands extensive data collection. This paper presents a novel metho
 dology using Long Short-Term Memory (LSTM) models to predict peak memory i
 n VLSI layout verification tools by analyzing memory consumption patterns 
 throughout runtime. Testing on Calibre's nmLVS tool achieved 72% average p
 rediction accuracy on unseen data, reaching 98% in specific cases, represe
 nting a 10% improvement over traditional neural networks. This approach de
 monstrates that leveraging sequential performance data enhances software b
 ehavior understanding while reducing the need for large, diverse datasets.
 \n\nTrack: Student\n\n
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