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DTSTAMP:20260730T152640Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T175600
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UID:dac_DAC 2026_sess306_WIP3299@linklings.com
SUMMARY:CMP-Aware Dummy-Fill Optimization via Generative Modeling and Meas
 urement-Calibrated Prediction
DESCRIPTION:Ji-Hye Lee (Computer Science Engineer (CSE) Team, Samsung Elec
 tronics); Min-Chul Park (Samsung Electronics, Device Solution); Yeji Kim (
 Computer Science Engineer (CSE) Team, Samsung Electronics); Usuk Chae and 
 Byungchul Shin (Technology Development, Samsung Electronics); Hyunjae Jang
  (Computer Science Engineer (CSE) Team, Samsung Electronics); JAE HYUN KAN
 G (Technology Development, Samsung Electronics); and SeongRyeol Kim, Young
 -Gu Kim, and Dae Sin Kim (Computer Science Engineer (CSE) Team, Samsung El
 ectronics)\n\nConventional rule-based dummy-fill methods satisfy density c
 onstraints but do not directly minimize chemical–mechanical polishing (CMP
 ) variation, requiring costly post-layout fixing. We propose a learning-ba
 sed dummy-fill insertion framework that enables proactive correction at th
 e design stage by coupling a measurement-calibrated (MCAL) CMP predictor w
 ith a polygon-based conditional multilayer (PCM) fill generator. Trained o
 n measurement data, the predictor, enhanced with shift correction for syst
 ematic offsets, achieves higher accuracy and efficiently identifies region
 s of high CMP variation. Leveraging PCM sequencing with blockwise causal a
 ttention, the generator produces diverse, design-rule-compliant multilayer
  fills conditioned on local active patterns. Coupling the generator and pr
 edictor enables design-space exploration that identifies optimal fills and
  reveals feature-CMP relationships guiding future fill strategies. The fra
 mework achieves substantially lower CMP variation on advanced-node benchma
 rks, demonstrating its effectiveness for practical deployment in advanced 
 design flows.\n\nTrack: Student\n\n
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