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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20260730T152640Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T175200
DTEND;TZID=America/Los_Angeles:20260728T175200
UID:dac_DAC 2026_sess306_WIP3289@linklings.com
SUMMARY:STA Accuracy Validation: A Machine Learning Approach
DESCRIPTION:Rujie Yin (Texas A&M University) and Rui Liu, Bogdan Tutuianu,
  and Florentin Dartu (Taiwan Semiconductor Manufacturing Company)\n\nStati
 c Timing Analysis (STA) plays a critical role in the design of high-perfor
 mance digital integrated circuits, ensuring reliable operation under varyi
 ng process conditions. This paper introduces a machine learning (ML) based
  approach to the problem of selecting relevant timing paths for STA accura
 cy validation. The proposed method helps significantly the tasks of timing
  path classification, important circuit feature identification and timing 
 tool accuracy prediction. Also, the proposed approach provides relevant ti
 ming path samples that capture the timing characteristics of the entire de
 sign. The final analysis of the tested sample paths' accuracy informs the 
 design methodology recommendations to EDA.\n\nTrack: Student\n\n
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