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LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T175200
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UID:dac_DAC 2026_sess306_WIP3285@linklings.com
SUMMARY:Spiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive 
 Local Learning in Spiking Neural Networks
DESCRIPTION:Alessio Caviglia, Filippo Marostica, Alessandro Savino, and St
 efano Di Carlo (Politecnico di Torino)\n\nDeploying adaptive intelligence 
 at the edge remains challenging due to the high computational and energy c
 ost of training neural models. SNNs offer a promising alternative, but ena
 bling on-device learning requires hardware–algorithm co-design. This paper
  presents SpikerLL, an FPGA-based SNNs accelerator that extends the open-s
 ource Spiker+ inference architecture with efficient support for the STSF l
 ocal learning rule. Through targeted microarchitectural extensions, Spiker
 LL performs inference and online learning with minimal overhead. Across MN
 IST, F-MNIST, and DIGITS, it achieves up to 93% accuracy, sub-millisecond 
 latency, and <0.1 mJ per inference, while remaining DSP-free and highly sc
 alable for edge-FPGA deployments.\n\nTrack: Student\n\n
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