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BEGIN:VEVENT
DTSTAMP:20260730T152639Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T170000
DTEND;TZID=America/Los_Angeles:20260728T170000
UID:dac_DAC 2026_sess306_WIP3253@linklings.com
SUMMARY:Agentic AI for Chip Design and Verification: Results and Limitatio
 ns from CVDP
DESCRIPTION:Jan Ole Ernst and Rajath Salegame (Normal Computing) and Igor 
 Markov (NVIDIA)\n\nWe benchmark a new agentic AI approach for chip design 
 and verification on the CVDP dataset. Our results show that multi-agent or
 chestration, custom system prompts, and improved tool-use guidance enable 
 our agent to debug and complete substantially more complex hardware verifi
 cation problems. On relevant CVDP problems, our agent demonstrates a relat
 ive advantage of 11.6% vs. CVDP state of the art performance and 15.3% vs.
  Claude Code. Beyond aggregate metrics, we analyze execution traces and fi
 nd evidence of enhanced reasoning and debugging capabilities, as well as i
 mportant limitations of under- and over-specified test harnesses.\n\nTrack
 : Student\n\n
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