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DTSTAMP:20260730T152640Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T173900
DTEND;TZID=America/Los_Angeles:20260728T173900
UID:dac_DAC 2026_sess306_LBR155@linklings.com
SUMMARY:Automated Design of Device Fingerprinting Circuits for FPGAs
DESCRIPTION:James Moore, Maire O'Neill, and CHONGYAN GU (Queen's Universit
 y Belfast)\n\nDesigning device fingerprinting circuits for FPGAs is challe
 nging due to limited knowledge about device layout and manufacturinginduce
 d biases, often resulting in poor uniqueness and biased responses. Existin
 g mitigation techniques are typically device-specific, time-consuming, and
  difficult to generalize. We propose an automated EDA tool, that analyses 
 the target FPGA to optimize circuit layout to maximise extracted entropy a
 nd mitigate systematic bias.\nAcross 100-device testbed, the tool outperfo
 rmed comparable manual designs, achieving near-ideal uniqueness and bias. 
 These results demonstrate that automated device-aware design can reliably 
 estimate and approach the best achievable performance on a given\nFPGA.\n\
 nTrack: Student\n\n
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