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DTSTAMP:20260730T152640Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T174100
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UID:dac_DAC 2026_sess306_LBR082@linklings.com
SUMMARY:Late Breaking Results: QUBO Approaches to Logic Equivalence Checki
 ng and Testing
DESCRIPTION:Tao-Chun Huang, Hao-Yu Tsai, You-Cheng Lin, Yi-Ting Li, and Wu
 qian Tang (National Tsing Hua University); Yung-Chih Chen (National Taiwan
  University of Science and Technology; Arculus System Co. Ltd.); Jian-Meng
  Yang (ARCULUS SYSTEM CO., LTD.); and Chun-Yao Wang (Dept. CS, National Ts
 ing Hua University)\n\nThis work presents a novel approach to formulate Lo
 gic Equivalence Checking (LEC) and Test Pattern Generation (TPG) problems 
 as Quadratic Unconstrained Binary Optimization (QUBO) formulations, allowi
 ng them to be solved with quantum algorithms such as Quantum Annealing and
  Quantum Approximate Optimization Algorithm. We propose an advanced QUBO f
 ormulation approach that significantly re- duces the qubit, quantum gate a
 nd quantum circuit depth requirements, thereby improving the scalability a
 nd efficiency of quantum algorithms. To the best of our knowledge, this is
  the first work that formulates LEC and TPG problems in the QUBO. This wor
 k opens up new possibilities for leveraging quantum computing in the domai
 ns of verification and testing.\n\nTrack: Student\n\n
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