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DTSTART;TZID=America/Los_Angeles:20260728T174200
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UID:dac_DAC 2026_sess306_LBR048@linklings.com
SUMMARY:Late Breaking Results: Hardware-Aware Compilation Reshapes Trainab
 ility in Variational Quantum Circuits
DESCRIPTION:Muhammad Kashif (eBrain Lab, Division of Engineering, New York
  University (NYU) Abu Dhabi, UAE) and Muhammad Shafique (New York Universi
 ty Abu Dhabi (NYUAD))\n\nVariational quantum circuits (VQCs) are typically
  evaluated at the logical design level when analyzing trainability. Howeve
 r, execution on real quantum devices requires hardware-aware compilation t
 o satisfy qubit connectivity and gate constraints. \nIn this paper, we exa
 mine how transpilation alone alters gradient statistics. Using parameter-s
 hift differentiation and gradient variance estimation, we compare logical 
 and transpiled circuits across three representative ansatz families: Effic
 ientSU2 (dense entanglement), TTN (tree tensor network), and RealAmplitude
 s (linear entanglement). We observe architecture-dependent trainability sh
 ifts: densely entangling circuits exhibit pronounced gradient reshaping in
  shallow regimes, structured tensor-network circuits remain comparatively 
 robust, and linear architectures show mixed behavior. Deep circuits across
  all families display minimal sensitivity to compilation. These findings d
 emonstrate that hardware mapping acts as an implicit structural transforma
 tion of the optimization landscape, motivating compilation-aware analysis 
 and co-design for VQCs.\n\nTrack: Student\n\n
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