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TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
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DTSTART:19701101T020000
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DTSTAMP:20260730T152640Z
LOCATION:Exhibit Hall
DTSTART;TZID=America/Los_Angeles:20260728T174300
DTEND;TZID=America/Los_Angeles:20260728T174300
UID:dac_DAC 2026_sess306_LBR021@linklings.com
SUMMARY:Late Breaking Results: EIV-Aware Backside PDN Synthesis Under Stri
 ct nTSV Spacing Constraints
DESCRIPTION:Yin-Qi Xu and Shao-Yun Fang (National Taiwan University of Sci
 ence and Technology)\n\nBackside power delivery networks (BSPDNs) alleviat
 e front-side routing congestion, yet they introduce new challenges, includ
 ing high resistance of buried power rails (BPRs) and nano-through-silicon 
 vias (TSVs), as well as stringent TSV spacing constraints. This paper pres
 ents the first power-aware BSPDN synthesis framework that simultaneously a
 ccounts for post-placement power demand and strict TSV spacing rules. The 
 proposed framework incorporates a lightweight resistive-network model to a
 ccurately evaluate effective instance voltage (EIV) and employs a three-ph
 ase optimization strategy to strategically align TSV allocation with power
 -intensive regions. Experimental results show that our approach reduces th
 e maximum EIV drop by up to 25\% compared with a state-of-the-art post-pla
 cement BSPDN method.\n\nTrack: Student\n\n
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