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DTSTAMP:20260730T152729Z
LOCATION:DAC Pavilion\, Exhibit Floor
DTSTART;TZID=America/Los_Angeles:20260729T150000
DTEND;TZID=America/Los_Angeles:20260729T160000
UID:dac_DAC 2026_sess296_ENGPOST231@linklings.com
SUMMARY:Static Timing Analysis (STA) Platform: An AI-Augmented Web System 
 for Scalable Static Timing Analysis and Optimization
DESCRIPTION:Subhash Uppala, Manjunath Nayak, Anoop Singh, Ayan Datta, and 
 Tusharkant Mishra (Sandisk)\n\nThis presentation introduces an AI-augmente
 d Static Timing Analysis (STA) analytics platform that shifts timing closu
 re from a reactive debugging process to a proactive, predictive, and data-
 driven workflow. The platform automatically ingests and structures large-s
 cale STA datasets, enabling interactive visualization of multi-corner and 
 multi-mode timing behavior. Machine-learning models are applied to predict
  slack evolution, identify high-risk paths and corners, detect timing anom
 alies, and estimate ECO effectiveness prior to implementation. By integrat
 ing deterministic STA results with AI-driven insights, the approach substa
 ntially reduces manual log analysis, accelerates timing closure cycles, an
 d improves sign-off confidence. This methodology allows engineers to quick
 ly prioritize critical timing issues, reduce regression risk, and efficien
 tly scale STA analysis as design size and complexity continue to increase.
 \n\nTopics: AI, Chiplet, Design, EDA, Quantum, Security, Systems\n\n
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