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BEGIN:VEVENT
DTSTAMP:20260730T152639Z
LOCATION:DAC Pavilion\, Exhibit Floor
DTSTART;TZID=America/Los_Angeles:20260728T170000
DTEND;TZID=America/Los_Angeles:20260728T180000
UID:dac_DAC 2026_sess295_ENGPRES350@linklings.com
SUMMARY:An Adjustable Length Compression Method for MBIST Repair Informati
 on
DESCRIPTION:Ouyang Keqing, Qi Cheng, Minqiang Peng, and Guohua Zhou (Sanec
 hips) and Sri Ganta (Synopsys)\n\nEmbedded memories occupy the largest par
 t of modern SoCs. As memories are high-density physical structure, they ar
 e more prone to failures than other circuits and concentrate the large maj
 ority of fabrication faults, affecting yield adversely. Hence, memory Buil
 t-In Self-Repair(BISR) is mandatory for maintaining acceptable fabrication
  yield. And the repair information will be burned into the electrically pr
 ogrammable fuse (efuse). As the chip scale increases and the number of mem
 ories increases, the required efuse resources also increase dramatically.\
 nTherefore, researchers have proposed a series of methods to efficiently c
 ompress memory repair information and save efuse space. In the traditional
  compression method, there is a repair segment consists of zero compress a
 nd repair chain, to handle the worst case, the zero compress will be calcu
 lated with the whole chain length and the repair chain data will use the l
 ongest Bisr register. \nThis paper proposes an adjustable length compressi
 on method to effectively save the storage space of repair information. As 
 the probability of memory faults is very low, and the fault location, numb
 er, and memory repair chain length vary. Therefore there is no need to sto
 re the longest bisr register and compress the whole repair chain. And the 
 more fault points in the memory, the greater the benefit of the adjustable
  length compression method.\n\nTopics: AI, Chiplet, Design, EDA, Quantum, 
 Security, Systems\n\n
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