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DTSTAMP:20260730T152639Z
LOCATION:DAC Pavilion\, Exhibit Floor
DTSTART;TZID=America/Los_Angeles:20260728T170000
DTEND;TZID=America/Los_Angeles:20260728T180000
UID:dac_DAC 2026_sess295_ENGPRES322@linklings.com
SUMMARY:Multi-Cycle Interconnect Synthesis in Small to Large Cutting Metho
 dology
DESCRIPTION:Jesse Surprise, nancy Zhou, Chandler Brown, and Josiah Hamilto
 n (IBM Research)\n\nThe IBM Small to Large (S2L) methodology is a flow tha
 t transitions flat small block physical design models to abutted large blo
 ck models.  One of the biggest challenges in the S2L flow has been latch t
 ree optimization.  Latch trees are fully described in the input logic, so 
 design changes often required resource-intensive manual work to update the
  latch trees in the input logic to re-optimize for timing and routing.  Sc
 hedule constraints often inhibited designers' ability to perform or mainta
 in this work resulting in inefficient implementations.  Multi Cycle Interc
 onnect Synthesis (MCIS), which generates multi cycle latch trees, is integ
 rated into the S2L flow to automate latch tree optimization and quickly ad
 apt to logic or physical design changes.  Parallel processing using a cost
  function considering timing, power and routing impact is implemented to e
 nsure the best construction for each latch tree.  Enhancements to MCIS are
  made to meet the requirements of the S2L flow, including built in awarene
 ss to the large block hierarchical boundaries.  Compared to the custom-bui
 lt solution, this method achieves better timing while using fewer cloned l
 atches and improved routability.\n\nTopics: AI, Chiplet, Design, EDA, Quan
 tum, Security, Systems\n\n
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