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BEGIN:VEVENT
DTSTAMP:20260730T152639Z
LOCATION:DAC Pavilion\, Exhibit Floor
DTSTART;TZID=America/Los_Angeles:20260728T170000
DTEND;TZID=America/Los_Angeles:20260728T180000
UID:dac_DAC 2026_sess295_ENGPOST474@linklings.com
SUMMARY:Accurate Full-Custom Thermal and EM Analysis for Advanced Nodes
DESCRIPTION:David Newmark (Advanced Micro Devices (AMD))\n\nAnalyzing circ
 uits for susceptibility to electro-migration has been a requirement for in
 tegrated circuit design since the 1960's.  In fact, one of the basic equat
 ions for electro-migration, Black's Equation, was formalized in 1969 and i
 s still in use today. In related work, Statistical Electro-migration budge
 ting (SEB) was developed by DEC in the 1980's.  Both these equations are t
 he foundation of the electro-migration analyses used in modern EMIR tools.
   One very important feature of these equations is that they are exponenti
 ally dependent upon the wire temperature and failures start to occur with 
 increasing probability at higher temperatures.  This fact is important bec
 ause with the introduction of new device structures such as FINFET, GAA, a
 nd possibly CFET, the power per unit area and resulting heating generated 
 by these structures has been increasing dramatically.  In addition, the po
 wer dissipated by high resistance wires and vias is also increasing as the
 se wires need to carry higher RMS currents to support higher frequency ope
 ration of the circuits.  Therefore, it is becoming increasingly critical t
 o model the temperature very accurately for small device structures to avo
 id EM failures associated with high device and wire heating.  By utilizing
  the latest Finite Element solvers (FEM) available from various CAD vendor
 s, accurate wire temperatures can be computed by solving the heat conducti
 on equations at the device and wire nanoscale thereby providing very usefu
 l feedback to designers regarding thermal and EM SEB FIT reliability risk 
 for unusual corner cases that require additional validation using these mo
 re accurate simulations.\n\nTopics: AI, Chiplet, Design, EDA, Quantum, Sec
 urity, Systems\n\n
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