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DTSTAMP:20260730T152730Z
LOCATION:DAC Pavilion\, Exhibit Floor
DTSTART;TZID=America/Los_Angeles:20260728T170000
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UID:dac_DAC 2026_sess295_ENGPOST121@linklings.com
SUMMARY:User Definable Custom Primitives in 3DIC AI-driven STCO: Case Stud
 y on Power Grid Optimization for IR Enhancement
DESCRIPTION:Yi-Wei Chen, Chung-Ching Peng, and Vivek Rajan (Intel) and Xuk
 ang Wu, Xiaohu Xu, Sonia Beghum, Keshava Manimunda, Weifeng Gu, Hanqi Yang
 , and Pinhong Chen (Cadence Design Systems, Inc.)\n\nIn AI-driven design o
 ptimization EDA flows, there is usually a pre-defined list of primitives, 
 which are options or parameters, that the flow can experiment on. By fine-
 tuning primitive values using AI-driven algorithms and analysis, EDA flows
  aim to produce optimal PPA (performance, power, and area) results with li
 ttle user guidance. The pre-defined primitive list, however, is not likely
  to be completely comprehensive, and users may request for additional prim
 itives to further improve PPA. Adding new primitives to EDA flows can take
  significant amount of time due to software development and qualification 
 timelines. In this work, we propose a novel methodology to allow users to 
 add customized primitives into existing AI-assisted EDA flows. We demonstr
 ate a case study on 3DIC power grid optimization to showcase this capabili
 ty. Power grids are usually product specific, and therefore prevents EDA v
 endors from pre-defining primitives related to power grid even for the sam
 e process technology. By using this methodology, users can instantaneously
  add or change customized primitives to expand capabilities in AI-driven o
 ptimization flows by exploring additional design/flow parameters not exist
 ed before, and thus opening new realms of possibilities for PPA improvemen
 ts with fast turn-around-time.\n\nTopics: AI, Chiplet, Design, EDA, Quantu
 m, Security, Systems\n\n
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