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DTSTAMP:20260730T152729Z
LOCATION:Seaside Ballroom A
DTSTART;TZID=America/Los_Angeles:20260727T153000
DTEND;TZID=America/Los_Angeles:20260727T154500
UID:dac_DAC 2026_sess276_ENGPRES335@linklings.com
SUMMARY:Scalable Hierarchical EMIR Analysis using Multi layered abstractio
 n for Reticle-scale data centre SOCs
DESCRIPTION:udayakumar yedakuppam, Karthik M, Tharun kumar Kakarla, and Sr
 inivasa Billa (Qualcomm)\n\nReticle-scale SoCs and repetitive compute fabr
 ics have fundamentally altered the scalability requirements of EMIR signof
 f. Modern designs composed of large, clustered subsystems and shared routi
 ng channels expose critical limitations in conventional flat EMIR analysis
  flows, including multi-day runtimes, compute memory saturation, and unman
 ageable activity data volumes. EDA Tool based boundary abstraction partial
 ly restores current accuracy but ignores logic interaction and propagation
 , limiting its effectiveness for localized IR detection. LEF with current 
 profile abstraction of blocks improves scalability but smoothens current d
 istribution, underestimating boundary bump currents and masking rail-shari
 ng and temporal switching correlations.\n\nThis work presents a novel hier
 archical and interaction-aware hybrid EMIR analysis methodology that combi
 nes region-based clustering with an abstraction strategy that selectively 
 applies Reduced-Order EDA Models and LEF with current profile abstraction 
 based on electrical sensitivity and interaction criticality. This mixed mo
 deling approach enables accurate logic propagation, realistic switching co
 rrelation, and precise modeling of rail sharing and bump contention withou
 t incurring the cost of full flat simulation. \n\nThe proposed flow achiev
 es up to 10× runtime reduction, 50% reduction in memory and database footp
 rint and extremely good correlation with flat EM/IR signoff. The methodolo
 gy is production-proven, easily adoptable within existing signoff flows, a
 nd directly applicable to next-generation reticle-scale, AI/ML SoC archite
 ctures.\n\nTopics: EDA, Systems\n\nSession Chair: Eduard Herkel (IBM Resea
 rch)\n\n
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