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DTSTAMP:20260730T152727Z
LOCATION:Seaside Ballroom A
DTSTART;TZID=America/Los_Angeles:20260727T111500
DTEND;TZID=America/Los_Angeles:20260727T113000
UID:dac_DAC 2026_sess265_ENGPRES068@linklings.com
SUMMARY:Building an Ontology-Driven Knowledge Graph for Constraint-Aware N
 avigation of Semiconductor Design Documents
DESCRIPTION:Jongwoo Ryu, JungSub Koh, Sungsu Kim, MinYoung Cho, DongKyu Ki
 m, and Youngsik Kim (Samsung Electronics)\n\nSemiconductor design involves
  extensive documentation, often spanning hundreds of pages in documents wi
 th highly intricate and complex internal relationships, making manual navi
 gation and cross-referencing highly inefficient. To overcome this critical
  bottleneck, we implemented a solution that significantly reduces manual e
 ffort by leveraging an Ontology-based Knowledge Graph (KG). Our core metho
 dology involves defining a formal ontology to systematically model the div
 erse entities (e.g., modules, registers, protocols) and their complex depe
 ndencies across disparate documents (specifications, reports, manuals). Th
 is structured conversion process transforms unstructured conversion proces
 s transforms unstructured documentation into a unified, queryable KG, whic
 h is the key to easily mapping and understanding the intricate web of conn
 ections inherent in the design. This paradigm shift from keyword matching 
 to relationship-aware knowledge representation significantly simplifies kn
 owledge discovery. Furthermore, this meticulously constructed Knowledge Gr
 aph serves as the knowledge base for Graph RAG chatbot, which provides eng
 ineers with accurate, context-aware answers to natural language queries.\n
 \nTopics: EDA\n\nSession Chair: Chandrakanth Betageri (Intel)\n\n
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