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DTSTAMP:20260730T152727Z
LOCATION:Mtg Room 101B
DTSTART;TZID=America/Los_Angeles:20260727T135500
DTEND;TZID=America/Los_Angeles:20260727T140800
UID:dac_DAC 2026_sess124_RESEARCH1466@linklings.com
SUMMARY:InferWeave: Efficient LLM Inference on the MT-3000 Processor
DESCRIPTION:Xinxin Qi, Jianbin Fang, Peng Zhang, and Yonggang Che (Nationa
 l University of Defense Technology)\n\nThe deployment of large language mo
 dels (LLMs) is increasingly targeting heterogeneous unified-memory archite
 ctures (HUMA) for edge and cost-sensitive computing. However, GPU-centric 
 inference systems perform suboptimally on HUMA due to shared DRAM bandwidt
 h contention and inefficient static operator placement. This paper introdu
 ces InferWeave, a bandwidth-aware inference framework that co-designs offl
 ine planning and runtime scheduling for HUMA. InferWeave's offline planner
  formulates operator placement and data staging as a unified optimization 
 problem with DRAM bandwidth as a first-class constraint. At runtime, a ban
 dwidth-aware asynchronous pipeline scheduler enforces these plans by regul
 ating memory access rates, enabling non-blocking execution across host and
  device. Evaluated on LLaMA and GPT models using the MT-3000 processor, In
 ferWeave achieves up to 2.3x higher throughput than FlexGen and llama2.c, 
 demonstrating its effectiveness in enabling efficient LLM inference on int
 egrated architectures.\n\nTopics: AI\n\nTrack: AI3-I. AI/ML Application an
 d Infrastructure\n\nSession Chairs: Yoichi Tomioka (University of Aizu) an
 d Takahide Yoshikawa (Fujitsu Research)\n\n
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