Session

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Late Breaking Results

: Late Breaking Results (LBR) Poster Session

Event Type

Late Breaking Results

TimeMonday, July 275:00pm - 7:00pm PDT

LocationExhibit Hall

Similar Sessions

Late Breaking Results, Work-in-Progress Poster Session

Work in Progress (WIP) Poster Session

RM Poster Session Nine

Presentations

5:00pm - 5:03pm PDT	Late Breaking Results: Physics-Aware Diffusion Framework for Transistor-Level Placement Beyond Standard-Cell Boundary Authors Keyu Peng Junhong Li Hao Wu Chao Wang Jun Yang Ziran Zhu
5:03pm - 5:06pm PDT	Late Breaking Results: Recoverability-Guided Layer-Wise N:M Sparsity Under Latency Constraints Authors Liu Yiming Wenqi Lou Ke Zhiwei Fengrui Zuo Chao Wang Xuehai Zhou
5:06pm - 5:09pm PDT	Late Breaking Results: A High-Performance TFHE Bootstrapping Accelerator with Heterogeneous Processing Engines Authors Haopeng Zhang Yukui Luo Jiafeng Xie Wenfeng Zhao
5:09pm - 5:12pm PDT	Automated Design of Device Fingerprinting Circuits for FPGAs Authors James Moore Maire O'Neill CHONGYAN GU
5:12pm - 5:16pm PDT	Late Breaking Results: Audio-Language-Action Models with Direct Speech Conditioning for Robotic Manipulation Authors Enfu Nan Pu Zhao Yixiao Chen Lin Zhao Juyi Lin Chen Wang Weiwei Chen Yanzhi Wang
5:16pm - 5:19pm PDT	Late Breaking Results: Hybrid-Bonding Architecture with Stage-Aware Mapping for Masked Autoregressive Model Inference Authors Wenxi Gao Zhenhua Zhu Hongyi Wang Yuan Xie Yu Wang
5:19pm - 5:22pm PDT	Neural Subgraph Matching for Hardware Decompilation in Gate-Level Netlists Authors Yunzhen Liu Yingjie Li Nan Wu
5:22pm - 5:25pm PDT	Late Breaking Results: Hardware-Aware Compilation Reshapes Trainability in Variational Quantum Circuits Authors Muhammad Kashif Muhammad Shafique
5:25pm - 5:29pm PDT	Late Breaking Results: Unified PCB Routing Considering Pair-Spacing and Width-Range Constraints Authors Wei-Chen Hung Jhih-Jie Lee Sheng-Hua Wang Yao-Wen Chang
5:29pm - 5:32pm PDT	Late Breaking Results: A Coarse-to-Fine PCB Placement Framework via LLM-Guided Component Grouping and Group-Aware Placement Authors Junhong Li Keyu Peng Fuxing Huang Hao Wu Ziran Zhu
5:32pm - 5:35pm PDT	Polaris: Enabling PIM-Optimized Low-Energy SpGEMM Using a Remote-Access-Aware Mapping Solution Authors Helya Hosseini Christina Giannoula Bahar Asgari
5:35pm - 5:38pm PDT	Late Breaking Results: A Unified Analytical Framework for MBFF Clustering and Placement for Timing, Power, and Area Co-Optimization Authors Chuan-Chi Su Yu-Sheng Yang Cheng-Yen Li Shao-Hsiang Chen Yao-Wen Chang
5:38pm - 5:42pm PDT	Late Breaking Results: QUBO Approaches to Logic Equivalence Checking and Testing Authors Tao-Chun Huang Hao-Yu Tsai You-Cheng Lin Yi-Ting Li Wuqian Tang Yung-Chih Chen Jian-Meng Yang Chun-Yao Wang
5:42pm - 5:45pm PDT	DScNMP: A Dataflow Scheduling for the Precision-Scalable Near-Memory Processing Microarchitecture Author yueting Li
5:45pm - 5:48pm PDT	Late Breaking Results: Efficient MoE-ViT Gating on Edge Accelerator via Dynamic Expert Routing and Quantized Router Authors Zheqi He Zhendong Zheng teng wang Nanhao Zhou Lei Gong Wenqi Lou Chao Wang Xuehai Zhou
5:48pm - 5:51pm PDT	SAT-Helper: A Multi-Agent System for Adaptive Optimizing Large-Scale Conjunctive Normal Form Authors Zhiyuan HE Rongliang Fu Pin-Yu Chen Tsung-Yi Ho
5:51pm - 5:55pm PDT	Late Breaking Results: Towards Low-Latency TinyML via Regularized Activation Packing Authors Georgios Mentzos Konstantinos Balaskas Georgios Zervakis Joerg Henkel
5:55pm - 5:58pm PDT	Late Breaking Results: Structured Expert Routing for Efficient MoE Inference Under GPU–CPU Orchestration Authors Yixiao Chen Arman Akbari Arash Akbari Zhendong Mi Enfu Nan Xiaowei Lin Weiwei Chen Shaoyi Huang Hao Wang Pu Zhao Yanzhi Wang
5:58pm - 6:01pm PDT	Late Breaking Results: EIV-Aware Backside PDN Synthesis Under Strict nTSV Spacing Constraints Authors Yin-Qi Xu Shao-Yun Fang
6:01pm - 6:04pm PDT	Late Breaking Results: Toward a Foundation Model for 3DIC Thermal Analysis and Beyond Authors Akhilesh Kumar Zelin Lu Norman Chang Igor Markov Lang Lin Jessica Yen Haoliang Jiang Wenbo Xia Yujing Luo Gang Qu
6:04pm - 6:08pm PDT	Late Breaking Results: Scalable OARSMT Generation via Predictive Topological Reduction in VLSI Routing Authors Xiqiong Bai Daiwei Zhang Xiutao Yan zhifeng lin Kun Wang Ziran Zhu Jianli Chen Zhikuang Cai
6:08pm - 6:11pm PDT	Late Breaking Results: "describing" Your Way to a Functional Microfluidic Chip Authors Yushen Zhang Louis Dickgießer Siyuan Liang Tsun-Ming Tseng Shigeru Yamashita Tsung-Yi Ho Ulf Schlichtmann
6:11pm - 6:14pm PDT	Late Breaking Results: Training-Free CCS Library Generation via Voltage Domain Transformation and PCHIP Interpolation Authors Meng-Hsuan Ho Hung-Ming Chen Hsuan-Ming Huang Jiun-Cheng Tsai
6:14pm - 6:17pm PDT	Late Breaking Results: ROAST: Reverse-Training Offset Attack on Spatial Sampling Topologies Authors Shayan Gerami Sepehr Tabrizchi Shaahin Angizi Arman Roohi
6:17pm - 6:21pm PDT	Late Breaking Results: Hardware-Efficient Quantum Reservoir Computing via Quantized Readout Authors Param Pathak Mansi Od Nouhaila Innan Muhammad Shafique
6:21pm - 6:24pm PDT	Late Breaking Results: HUSH: Silencing Inter-Core Interference in Real-Time Cache Analysis Authors Haoyuan Ren Yinkang Gao Yixuan Zhu Bo Zhang teng wang Wenqi Lou Xi Li
6:24pm - 6:27pm PDT	Late Breaking Results: Fisher-Guided Selective Error Reconstruction for Quantized LLMs Authors Seonha Ryu Il Hong Suh Yeseong Kim
6:27pm - 6:30pm PDT	Late Breaking Results: Power Mesh Construction for 3D-IC with Backside Power Delivery Authors Chien-Pang Lu Chun-Hao Lai Iris Hui-Ru Jiang Chih-Hsiang Yang Chung-Ching Peng
6:30pm - 6:34pm PDT	Late Breaking Results: A Fully Differentiable Rectilinear Minimum Spanning Tree Wirelength Model for Global Placement Authors Fuxing Huang Hao Wu Junhong Li Qiyuan Chen Wenxing Zhu xinning liu Ziran Zhu
6:34pm - 6:37pm PDT	Late Breaking Results: Astfusion -- Two-Stage Structural Enhancement Learning for Robust HLS Code Generation Authors Ke Zhiwei Wenqi Lou Liu Yiming Fengrui Zuo Chao Wang Xuehai Zhou
6:37pm - 6:40pm PDT	Late Breaking Results: Merge-Aware Placement and DP-Based Wave Propagation Routing for Scalable Flip-FET Cell Layout Synthesis Authors Hao Wu Fuxing Huang Qiyuan Chen Junhong Li Keyu Peng Ziran Zhu
6:40pm - 6:43pm PDT	Late Breaking Results: Nano-TSV Assignment for Backside Power Delivery Network Designs Considering Stress and IR-Drop Effects Authors Maoze Liu Yao-Wen Chang Kai-Yuan Chao
6:43pm - 6:47pm PDT	Late Breaking Results: LLM-Driven Constraint Generation and Deferred Shape Exploration for Analog IC Floorplanning Authors Yu Chen Fuxing Huang Chengjie Liu Xi Wang Ziran Zhu
6:47pm - 6:50pm PDT	Late Breaking Results: 3D Analytical Placement with Smoothed Multi-Die Wirelength Model Authors Xingyu Tong Chih-Jung Hsu Guohao Chen Yin-Hsuan Hung Jianli Chen Yao-Wen Chang
6:50pm - 6:53pm PDT	Late-Breaking Results: Ultra Energy Efficient Personalized Glucose Prediction with RLS Implementation on a Tiny FPGA Authors Georgios Mentzos Theodora Podimata Georgios Zervakis Emmanouil Psarakis Joerg Henkel
6:53pm - 6:56pm PDT	Hierarchical ML-Framework for Rapid RDL and Bump Optimisation in GPIO-Encroached Flip-Chip SoCs Authors PRATEEK PENDYALA Vishant Gotra
6:56pm - 7:00pm PDT	Late Breaking Results: Novel Qubit Mapping for Two-Dimensional Trapped-Ion Quantum Computing Systems Authors Wei-Hsiang Tseng Yao-Wen Chang Jie-Hong Roland Jiang

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