Session <Full Program · Contributors · Organizations · Search Program · Flagged · My Recommendations · Happening NowMore…Search ProgramFlaggedMy RecommendationsHappening NowWork in Progress: Work in Progress (WIP) Poster SessionEvent TypeWork in ProgressTimeMonday, July 275:00pm - 7:00pm PDTLocationExhibit HallSimilar SessionsLate Breaking Results, Work-in-Progress Poster SessionRM Poster Session ThreeRM Poster Session FourPresentations5:05pm - 5:06pm PDTDefending Side-Channel Attacks in Client-Side Deduplication with Hardware/software CodesignAuthorsYinjin FuQingli ZengJian WuNong Xiao5:06pm - 5:07pm PDTLate Breaking Results: Guiding Compiler Optimizations for Neutral Atom Quantum Computers Through VisualizationsAuthorsYannick StadeRobert Wille5:07pm - 5:08pm PDTAn Autonomous Design Agent of Parallel Feedforward Equalizer for Advanced Wireline ReceiversAuthorsYou-Cheng TuRui-Yong KuoWei-Zen Chen5:11pm - 5:12pm PDTLate Breaking Results: Influential Data Selection for LLM-Based RTL GenerationAuthorsZhan SongCunxi Yu5:13pm - 5:14pm PDTAgentic AI for Chip Design and Verification: Results and Limitations from CVDPAuthorsJan Ole ErnstRajath SalegameIgor Markov5:14pm - 5:15pm PDTLinearly Scalable Algorithms for DFT Static Verification, Coverage Analysis, and Debug at RTLAuthorsKanad ChakrabortyVinod Viswanath5:15pm - 5:15pm PDTML-Net: Enhanced Interconnect Modeling Through Machine Learning–based Framework and Novel Double-π NetworksAuthorsParsa MirfasihiJatan MandaliyaOmar YamakAhmed ShebaitaHamid Mahmoodi5:18pm - 5:18pm PDTLate Breaking Results: FeMFET Multi-Level Cell Capacity Limits for SNN-Based Compute-in-Memory InferenceAuthorsOsama AbdelaalAlptekin VardarNandakishor YadavThomas Kämpfe5:21pm - 5:21pm PDTAccelerated Dynamic Voltage Drop Prediction Using a Lightweight Machine Learning ModelAuthorsItay YonatanovIdo ParchomovskyMohamad OmariFreddy Gabbay5:21pm - 5:22pm PDTLate Breaking Results: Encoding-in-Memory via Generating True Random One-Time PasswordAuthorsRanyang ZhouGamana AragondaAbeer AlmalkyFilip Roth Tronnes-ChristensenAdnan Siraj RakinShaahin Angizi5:23pm - 5:24pm PDTWill AI Mess my RTL? A Snapshot-Based Approach to Verifying AI-Written RTLAuthorsBernat HomsOscar PalomarMiquel MoretoMarcelo Orenes-Vera5:26pm - 5:27pm PDTLate Breaking Results: Energy-Aware Scheduling of Open-Vocabulary Detection on Low-Power Mobile RobotsAuthorsAbdul BasitNurik SerikbayevMuhammad Shafique5:27pm - 5:27pm PDTLate Breaking Results: A Neuromorphic Accelerator for Efficient Multi-Head Attention Processing in Spiking Vision TransformersAuthorsRachmad Vidya Wicaksana PutraAmirhesam Jafari RadMuhammad Shafique5:27pm - 5:28pm PDTA Novel Way to Handle Non-Convergence of Properties in Formal Verification of Digital SystemsAuthorssurinder soodkishan musharNirmal Jose5:31pm - 5:32pm PDTLate Breaking Results: Micro-Dense Tensor-Core-Aligned N:M Sparse Kernel for Efficient Inference AccelerationAuthorsLiu YimingWenqi LouKe ZhiweiFengrui ZuoChao WangXuehai Zhou5:33pm - 5:33pm PDTR5-Link : Enhancing RISC-V Multi-Core Efficiency with Hardware Message Passing Channels in a 2D Mesh NetworkAuthorsYosef IdaNachman AbargilSarit ShvimerAlex GrinshpunFreddy Gabbay5:34pm - 5:35pm PDTLate Breaking Results: Analog Circuit Sizing Optimization Using Procrustes-Guided Machine Learning HeuristicsAuthorsBrandon HippeDavid BurnettLydia Lee5:35pm - 5:36pm PDTHierarchical Learning–based Digital Circuit Design Tuning Framework for Power-Delay OptimizationAuthorsIjun JangJaeseung BaikGwanwoo ParkSejun ParkMingeun SongDahun KoDoohyun YuHanwool Jeong5:37pm - 5:38pm PDTLate Breaking Results: Fast Energy-Aware Neural Network Modeling for Efficient FPGA-Based InferenceAuthorsRishi AgrawalAndrea Guerrieri5:39pm - 5:40pm PDTLate Breaking Results: Die Area and Temperature Co-Optimization for Thermal Throttling Mitigation in Mobile Application ProcessorsAuthorsJisoo HwangSoYoung Kim5:42pm - 5:43pm PDTLate Breaking Results: A Scalable and Efficient Multi-Layer 3D-Printed Microfluidic Design SynthesisAuthorsJiashuo ChenYushen ZhangTsun-Ming TsengUlf Schlichtmann5:49pm - 5:50pm PDTPASCAL: ML-Based Predictive Skew Compensation for Asymmetric Clock Tree AgingAuthorFreddy Gabbay5:52pm - 5:53pm PDTSplit–and–sync Bayesian Learning–driven SRAM Compiler: Automatic Design Tuning with Optimal BankingAuthorsJaeseung BaikIjun JangGwanwoo ParkSejun ParkMingeun SongDahun KoDoohyun YuHanwool Jeong5:54pm - 5:55pm PDTLate Breaking Results: Quantum-Aware Model Compression Techniques for Scalable Quantum Machine LearningAuthorsNouhaila InnanMuhammad Shafique6:05pm - 6:06pm PDTLate Breaking Results: High-Fidelity Simulation and Real-Time Forecasting of Fluid-Solute-Coupled MicrofluidicsAuthorsSiyuan LiangChenghan WangYushen ZhangZhiqiang JiaMengchu LiTsun-Ming TsengUlf SchlichtmannTsung-Yi Ho6:09pm - 6:10pm PDTLate Breaking Results: Tiny Brain, Big World: Autonomous MCU-Friendly Navigation for Mapless Dynamic EnvironmentsAuthorsOmer KurkutluArman Roohi6:10pm - 6:10pm PDTLate Breaking Results: A Resource-Constrained Co-Design Framework for Enabling Heterogeneous Quantum Chiplet Ensembles via Circuit CuttingAuthorsAlberto MarchisioMuhammad KashifNouhaila InnanWalid El MaouakiMuhammad Shafique6:10pm - 6:11pm PDTLate-Breaking Results: QML for Quantum Sensing Under Measurement-Induced Information LossAuthorsSounak BhowmikHimanshu Thapliyal6:13pm - 6:13pm PDTLate Breaking Results: Synthesizable 8-Bit Digital Memristor Emulator with Programmable State Retention for Accelerated Edge ComputingAuthorsShekhar Suman BorahPhilip WaldeckerHenry TorbertPrabha Sundaravadivel6:14pm - 6:15pm PDTNPU-Based Energy-Efficient LLM Inference for Semiconductor Equipment Control Code GenerationAuthorsSanghyeok ParkSeunghoo HongSimon Woo6:15pm - 6:16pm PDTLate Breaking Results: Hardware-Efficient PQ Search Framework for Sparse Coding-Based KV Cache CompressionAuthorsSohyeon KimDoohyun ChoMyounghoon ChoDonghoon HanSeungJae LeeJi-Hoon Kim6:20pm - 6:21pm PDTLate Breaking Results: Analog Circuit Sizing via LLM-Guided Heuristic Search with Metric Difficulty AwarenessAuthorsXinyue WuFan HuJani ShaikZixuan LiMohamed El-HadedyXinfei Guo6:26pm - 6:27pm PDTLate Breaking Results: Hightide: an Open-Source Hardware Benchmark SuiteAuthorsBenjamin GoldblattPaolo PedrosoFarhad ModaresiMatthew Guthaus6:27pm - 6:28pm PDTLate Breaking Results: Q-STEP: A Cross-Layer Design and Validation Framework for Advancing Quantum SensingAuthorsGabrielle MacNeilHari PaudelQiaoyan Yu6:29pm - 6:30pm PDTLockroute: A Spatial Locking Framework for Parallel Global RoutingAuthorsAmber ThrallVidya ChhabriaS. M. FerdousMahantesh HalappanavarBala Krishnamoorthy6:30pm - 6:31pm PDTAccelerating Functional Fault Grading for Flash and DRAM DesignsAuthorsEuisang YoonArun GogineniSaurabh SrivastavaEunjong OhSeongwook LeeSungyun YooGeonbeom KwonYoseop LeeHyojin Choi6:31pm - 6:32pm PDTChiplite: High-Level Performance Modeling Methodology for Automotive Chiplet SystemsAuthorsDiksha MoolchandaniVinay Kumar6:32pm - 6:32pm PDTEdgeQ‑GEMM: INT4/INT8 Mixed‑Precision GEMM Accelerator with On‑the‑Fly Quantization for Accuracy–Energy Tunability in Edge AI ProcessorsAuthorsChaebin JungKyeongwon LeeHyunseok KwakJongin ChoiSechan ParkSangmin JeonHyeonguk JangJae-Jin LeeWoojoo Lee6:32pm - 6:33pm PDTSwift-Healer: Firmware-Reconfigurable Self-Healing for Remote Glitch-Injection on Autonomous Driving SystemsAuthorsAli SuviziJoshua IwuKostas AmberiadisGuru Venkataramani6:33pm - 6:34pm PDTThe Last Line of Defense in DNN Inference: Argmax Security Under Combined Power Side-Channel and Fault Injection AttackAuthorsLe WuLiji WuYuyang PanXiangmin Zhang6:34pm - 6:35pm PDTCompact ML-Based Glitch Propagation Modeling of Standard CellsAuthorsAnastasis VagenasDimitrios GaryfallouGeorge Stamoulis6:35pm - 6:35pm PDTRELMAS-HRT: Online Inference Scheduling in Mixed-Criticality Multi-Tenant Multi-Accelerator Systems via Reinforcement LearningAuthorsFrancesco BlancoEnrico RussoGiuseppe AsciaMaurizio Palesi6:36pm - 6:37pm PDTNucleus: A Reconfigurable Long-Context LLM Accelerator Using Adaptive Outlier-Aware KV Cache QuantizationAuthorsYoungmin ChoYoontae LeeLojin ParkSunjae LeeJimin LeeJeongwoo ParkYoung Oh6:37pm - 6:38pm PDTPHAP: A Pre-Analyzed Head-Wise Attention Pattern for Efficient Sparse Attention in LLM InferenceAuthorsSeonghan KwonDaeyoung KimHyunjae JangJaewook KimYeonJoo JeongInho KimJong-Kook KimSeongsik ParkJongkil Park6:38pm - 6:38pm PDTNeuromorphic Ising Solver with Signed Spiking Neuron and Interleaving Simulated Annealing for Large-Scale Traveling Salesman ProblemAuthorsSeongsik ParkJongkil Park6:38pm - 6:39pm PDTTechnology-Oriented DTCO Framework Using Neural Compact Modeling and Polar Level-Set ClusteringAuthorsYongjeong LeeJeonghwan KimJinyoung LeeYoungbin LeeJeongYeol KimJung Yun Choi6:39pm - 6:40pm PDTAn Energy-Efficient Automated Hardware Generator for Edge BCI SystemsAuthorsChih-Chyau YangHao-Ruei JiangChien-Ming WuChun-Ming Huang6:40pm - 6:41pm PDTSpec2Plan: A Robust LLM-Powered Framework for Verification Plan Generation and EvaluationAuthorsTing-Wei ChenTzu-Wei TsengPei-Yun YenXin-Hong OuYun-Ru LiHong-Siang WuJheng-Han LaiYi-Xin YangYi-Hang ChenGung-Yu PanMing-Hui HsiehChung-Yang (Ric) Huang6:41pm - 6:41pm PDTSpiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive Local Learning in Spiking Neural NetworksAuthorsAlessio CavigliaFilippo MarosticaAlessandro SavinoStefano Di Carlo6:41pm - 6:42pm PDTSTA Accuracy Validation: A Machine Learning ApproachAuthorsRujie YinRui LiuBogdan TutuianuFlorentin Dartu6:42pm - 6:43pm PDTPRAC-Auto: A Flexible and Efficient Framework for PRAC-Based Rowhammer MitigationAuthorsSeomgim JeongSunggi AhnSaeid GorginJungrae Kim6:43pm - 6:44pm PDTGzswap: Mitigating GPU I/O Bottlenecks in Heterogeneous Memory Systems Through On-Device ZswapAuthorsBoyeol ChoiSanghyun ParkSanyhyun HongJungrae Kim6:44pm - 6:44pm PDTBeyond Static Policies: Dynamic-PRAC for Balanced and Efficient Rowhammer MitigationAuthorsJeonghyun LeeMinwoo AhnJisung ParkJinkyu Jeong6:44pm - 6:45pm PDTSNN Accelerator Testing via Sparse Test MatricesAuthorsOsita UkwuabaCory Merkel6:45pm - 6:46pm PDTSPEEDY: Single-Step Reinforcement Learning Framework for Efficient Analog Circuit Sizing OptimizationAuthorsChun-Yen YaoChun-Yen WuMatteo GuarreraAlberto Sangiovanni-VincentelliPierluigi NuzzoRikky Muller6:46pm - 6:47pm PDTHigh Fan-in Dynamic Leakage Suppression Standard Cells for Improved Power, Performance, and Area in Ultra-Low Power Circuits Authors: Suprio Bhattacharya and Benton Highsmith CalhounAuthorsSuprio BhattacharyaBenton Calhoun6:47pm - 6:47pm PDTSPICEMixer - Netlist-Level Circuit EvolutionAuthorsStefan UhlichAndrea BonettiArun VenkitaramanChia-Yu HsiehYagiz GencerMustafa Emre GursoyRyoga MatsuoLorenzo Servadei6:47pm - 6:48pm PDTLighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset PointsAuthorsMustafa GürsoyStefan UhlichRyoga MatsuoYağız GençerArun VenkitaramanChia-Yu HsiehAndrea BonettiLorenzo Servadei6:48pm - 6:49pm PDTEtch-Vigen: A Video Generation Model for Etching SimulationAuthorsLi DingZhenjie YaoLingfei WangRui ChenZhiqiang Liling li6:49pm - 6:50pm PDTReConCHF: ReRAM-Based Reconfigurable Architecture for Cryptographic Hash Functions with Software/hardware IntegrationAuthorsChing-En KaoChin-Fu Nien6:50pm - 6:50pm PDTTIDE: A Triangular Interaction-Symmetric Dual-Systolic Engine for Efficient Acceleration of Physics-Inspired OptimizationAuthorsChia-Hua YenChin-Fu NienRen-Guey LeeYuan-Ho Chen6:50pm - 6:51pm PDTTrace and Chase: Empowering LLMs to Identify the Root Cause of Test Failures in RISC-V SoCs via Textualized WaveformAuthorsYicheng ZhongJingzheng WuXiang LingHao LyuZhiqing RuiTianyue LuoChen Zhao6:51pm - 6:52pm PDTCMP-Aware Dummy-Fill Optimization via Generative Modeling and Measurement-Calibrated PredictionAuthorsJi-Hye LeeMin-Chul ParkYeji KimUsuk ChaeByungchul ShinHyunjae JangJAE HYUN KANGSeongRyeol KimYoung-Gu KimDae Sin Kim6:52pm - 6:53pm PDTA Fast and Accurate Surrogate Model for Clock-Mesh Timing AnalysisAuthorsMuhammad Hadir KhanMatthew Guthaus6:53pm - 6:53pm PDTAtto-Spinformer: An Energy-Efficient Magneto Electric Spin Orbit Logic-Based Compute-in-Memory Transformer ArchitectureAuthorsHasita VeluriDilip Vasudevan6:53pm - 6:54pm PDTFast and Accurate RRAM Write-and-Verify via Hadamard-Encoded Read and ADC-Energy-Reduced HARPAuthorsIlhuan ChoiJiwon YooYoona LeeYewon JeongJason LeeWoo-Seok Choi6:54pm - 6:55pm PDTLeak-CIM: A PVT-Robust and Energy-Efficient SRAM-CIM Macro Exploiting Transistor LeakageAuthorsHiroto TagataHiromitsu AwanoTakashi Sato6:55pm - 6:56pm PDTGeneralized Structural Bias Analysis for Corrupt-and-Correct Logic LockingAuthorsJoseph MaderaKyle Juretus6:56pm - 6:56pm PDTTactician: A Formal Workflow for Discovering Unintended Interactions Among Microarchitectural DefensesAuthorsKartik RamkrishnanStephen McCamantPen YewAntonia Zhai6:56pm - 6:57pm PDTLSTM-Based Performance Modeling for Enhanced Peak Memory Prediction in Layout Versus Schematic Verification ToolsAuthorsNorhan AbdelhafezAhmed HosnyMohamed AbouelyazidSamar Abd El-HadyWael ElManhawySamy Nada6:57pm - 6:58pm PDTA 1.31 TOPS/W CGRA Hardware with SIMD and Programmable Memory Address Generation Unit for Edge AIAuthorsRakshith HarishVishnu NambiarYuntian LiuYi Sheng ChongWang Ling GohRahul DuttaAnh Tuan Do6:58pm - 6:59pm PDTO-RRP: Optical Proximity Correction Runtime and Resource Prediction Using Machine LearningAuthorsNeha SharmaWyatt ClarkeDallas LeaLei ZhuangJeonghee KimHarsha KrishnareddyEdward SeaboltVandana MukherjeeGi-Joon Nam6:59pm - 7:00pm PDTTerastal: Layer-Variant-Based Scheduling for Real-Time Multi-DNN Workloads on Heterogeneous AcceleratorsAuthorsSing-Yao WuFengshuo SongEli Bozorgzadeh