Session

DescriptionAs Artificial Intelligence expands across semiconductor engineering, new opportunities are emerging beyond verification into implementation flows. This session explores how AI startups are rethinking RTL creation, logic optimization, physical design, timing closure, emulation, design validation, and analog/mixed-signal development. Founders and technical experts will discuss how advanced AI techniques improve design exploration, automate repetitive tasks, accelerate convergence, speed engineering feedback loops, and help teams manage increasingly complex chip architectures. From RTL intent capture to placement, routing, signoff optimization, verification acceleration, and analog assistance, the session highlights where progress is already being made. Participants will hear candid perspectives on deployment challenges, integration with established toolchains, and where the next wave of disruption may occur. This session is designed for RTL designers, implementation engineers, verification teams, analog designers, CAD teams, and technology decision-makers.