Session
Harnessing the Noise: p-Bits, ZKPs, and Resilient AI
Description
This session explores how unconventional computing paradigms—from cryptographic randomness to probabilistic fluctuations—are being harnessed to build secure, resilient systems. The session begins by addressing the computational bottlenecks of Zero-Knowledge Proofs (ZKP) and Elliptic Curve Cryptography (ECC). The two opening papers introduce an end-to-end FPGA-accelerated ZKP system and a pioneering photonic-electronic engine for Merkle trees. These are followed by hardware acceleration for zkVM front-end trace generation, a unified ISA for flexible elliptic curve multiplication, and a high-throughput framework for algebraic proof systems on edge devices. The next four papers focus on Stochastic and Probabilistic Computing, where "noise" is transformed into a computational resource. They examine a novel stochastic MAC architecture, a low-latency architecture for counter-based stochastic computing, an RRAM-based architecture for combinatorial optimization, and a self-compensating p-bit unit for Gaussian noise generation. The session concludes with a co-optimization framework that harnesses the inherent fault tolerance of Diffusion Models for energy-efficient AI inference.
This session explores how unconventional computing paradigms—from cryptographic randomness to probabilistic fluctuations—are being harnessed to build secure, resilient systems. The session begins by addressing the computational bottlenecks of Zero-Knowledge Proofs (ZKP) and Elliptic Curve Cryptography (ECC). The two opening papers introduce an end-to-end FPGA-accelerated ZKP system and a pioneering photonic-electronic engine for Merkle trees. These are followed by hardware acceleration for zkVM front-end trace generation, a unified ISA for flexible elliptic curve multiplication, and a high-throughput framework for algebraic proof systems on edge devices. The next four papers focus on Stochastic and Probabilistic Computing, where "noise" is transformed into a computational resource. They examine a novel stochastic MAC architecture, a low-latency architecture for counter-based stochastic computing, an RRAM-based architecture for combinatorial optimization, and a self-compensating p-bit unit for Gaussian noise generation. The session concludes with a co-optimization framework that harnesses the inherent fault tolerance of Diffusion Models for energy-efficient AI inference.
Event Type
Research Manuscript
TimeWednesday, July 293:30pm - 5:30pm PDT
LocationMtg Room 203AB
Design
DES1-I. SoC, Heterogeneous, and Reconfigurable Architectures
Presentations
