Session
Architectures for Sparse, Adaptive, and Scalable Acceleration
Session Chairs
DescriptionModern accelerator-centric systems must integrate specialized compute engines with efficient memory hierarchies and scalable interconnects. This session presents advances spanning sparse tensor compilation and streaming accelerators, runtime-adaptive FPGA and heterogeneous platforms, and innovations in memory and buffering, from tile-level optimizations and fine-grained cache partitioning to HBM performance characterization. The session concludes with work on distributed buffering and scale-up network infrastructure, highlighting how architectural techniques across compute, memory, and system levels collectively enable high-performance, adaptable, and scalable acceleration.
Event Type
Research Manuscript
TimeMonday, July 273:30pm - 5:30pm PDT
LocationMtg Room 202C
Design
DES1-I. SoC, Heterogeneous, and Reconfigurable Architectures
Presentations
| 3:30pm - 3:42pm PDT | SpArC: Sparse Tensor Accelerator Compilation with Scheduling and Mapping | |
| 3:42pm - 3:54pm PDT | TRIDENT: An End-to-End Streaming Accelerator for TriSpGEMM | |
| 3:54pm - 4:06pm PDT | Procyon: Promoting Fine-Grained Multi-Tenancy to Optimize Sparse Streaming Accelerators | |
| 4:06pm - 4:18pm PDT | TRINE: A Token-Aware, Runtime-Adaptive FPGA Inference Engine for Multimodal AI | |
| 4:18pm - 4:30pm PDT | PHAROS: Pipelined Heterogeneous Accelerators for Real-Time Safety-Critical Systems With Deadline Compliance | |
| 4:30pm - 4:42pm PDT | Can Asymmetric Tile Buffering Be Beneficial? | |
| 4:42pm - 4:54pm PDT | Cachence: Fine-Grained Cache Partitioning in Both Time and Space | |
| 4:54pm - 5:06pm PDT | Toki: Profiling HBM Performance on FPGA Systems with RISC-V Soft Cores and PCIe Host DMA Traffic | |
| 5:06pm - 5:18pm PDT | Credix: A Credit-Driven Distributed Buffer Management for Large-Scale Switching Chips | |
| 5:18pm - 5:30pm PDT | OpenSUN: An Open Platform for Exploring Scale-Up Network Systems |