Session

DescriptionFor future quantum systems, hardware infrastructure obviously determines practical performance. This session focuses on the physical and system-level foundations of quantum computing, including cryogenic compression, readout acceleration, calibration scheduling, FPGA- and SoC-based control, superconducting logic, and electromagnetic reliability modeling. The works presented address bandwidth bottlenecks, real-time constraints, drift mitigation, and hardware-aware optimization across the cryo–room-temperature boundary. Together, these contributions advance scalable quantum infrastructure by improving energy efficiency, latency, robustness, and architectural reliability. By bridging device physics and system design, this session highlights how engineering the quantum core is essential for enabling large-scale, fault-tolerant quantum computing.