Session
Charting the Architecture of Tomorrow’s Fault Tolerant Quantum Machines by harmonizing Codes to Systems
DescriptionAchieving practical fault tolerant quantum computing requires tightly integrated design across error correcting codes, architecture, and compilation. This session presents advances in automated syndrome extraction scheduling, architecture aware transpilation for neutral atom systems, decoder accelerator design, lattice surgery optimization, reduced code switching overhead, and algorithmic break even analysis. Collectively, these works show how coordinated optimization of logical encoding, physical constraints, and compiler strategies reduces circuit depth, qubit movement, decoding latency, and logical error rates. By aligning code design with scalable architectures and modern compiler stacks, the session advances the automation tools needed to drive next generation fault tolerant quantum computing. Ultimately, these contributions illuminate a path toward quantum machines that not only scale, but fundamentally reshape the boundaries of what computation can achieve.
Event Type
Research Manuscript
TimeTuesday, July 281:30pm - 3:00pm PDT
LocationMtg Room 203AB
Design
Quantum
DES6. Quantum Computing
Presentations
