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Session

Research Manuscript
:
Silicon Integrity 2.0: Detection, Tracking, and Attestation
DescriptionEnsuring trust in modern silicon requires defending against increasingly sophisticated threats spanning design, architecture, and manufacturing. This session presents advances in hardware Trojan detection, secret tracking, side-channel analysis, undocumented instruction discovery, SRAM aging leakage, ReRAM vulnerabilities, IP protection, and wafer-level tool-chain attestation. Together, these works expose emerging attack surfaces while introducing systematic techniques for detection, verification, and protection across the hardware lifecycle. The session highlights the evolving challenges of building and maintaining trust in silicon from design through deployment.
Event Type
Research Manuscript
TimeTuesday, July 2810:30am - 12:30pm PDT
LocationMtg Room 203C
Topics
Security
Tracks
SEC3-II. Hardware Security: Attack and Defense
Presentations
10:30am - 10:43am PDTDetrojan: Detecting Trojan Circuits Using a Purpose-Built Graph Neural Network with Community-Enhanced Classification
10:43am - 10:56am PDTReconnaissance: Correctly Tracking Multiple Secrets Using Reveal/conceal Paradigms
10:56am - 11:10am PDTNetdetox: Adversarial and Efficient Evasion of Hardware-Security GNNs via RL-LLM Orchestration
11:10am - 11:23am PDTPD-Net: Learning Device-Invariant Representations for Heterogeneous Cross-Device Side-Channel Attacks
11:23am - 11:36am PDTAutomated Discovery, Classification, and Systematic Security Verification Methodology for Undocumented Instructions
11:36am - 11:50am PDTNothing Left to Learn: Isomorphic Graph Transformations for Hardware IP Protection
11:50am - 12:03pm PDTDecoding the Past: Recovering Sensitive Data from SRAM Aging Imprints
12:03pm - 12:16pm PDTBREW-RC: Bit-Exact Recovery of ECCs from Write Timing in ReRAM Crossbars
12:16pm - 12:30pm PDTSTAMP: Semiconductor Tool-Chain Attestation Through Wafer-Level Machine Learning-Based Process Monitoring