Session

DescriptionAs large language models scale in size and deployment complexity, system-level orchestration across heterogeneous hardware, memory hierarchies, and execution strategies becomes critical. This session brings together ten works that tackle key bottlenecks in LLM training and inference, including CPU–GPU co-execution for MoE and serving, runtime tensor-parallel transformation, adaptive prefetching for long-context decoding, and throughput-oriented speculative decoding. Complementary techniques in lossless compression, memory swapping, asymmetric checkpointing, and chip-to-chip interconnect exploration further address memory efficiency and scalability. Collectively, these papers highlight how intelligent orchestration across compute, memory, and interconnect layers enables more efficient, flexible, and high-throughput LLM systems.