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Bei Yu
The Chinese University of Hong Kong
Presentations
Research Manuscript
Moduplace: LLM-Assisted Modular PCB Placement via Preference-Optimized Constraint Graph Generation
4:18pm - 4:30pm PDT Tuesday, July 28 Mtg Room 203AB
EDA
EDA7-II. Physical Design and Verification
Research Manuscript
CPW-SMO: Generating Mask Sets and Common Source for Maximum Common Process Window
2:08pm - 2:21pm PDT Tuesday, July 28 Mtg Room 202AB
EDA
EDA8. Design for Manufacturability and Reliability
Research Manuscript
Integrated Timing-Driven Placement for Hybrid-Bonding-Based Face-to-Face 3D ICs
4:30pm - 4:42pm PDT Wednesday, July 29 Mtg Room 202AB
EDA
EDA7-I. Physical Design and Verification
Research Manuscript
RTL-3D: Timing-Aware Tier Partitioning for 3D ICs Using Pre-Synthesis Timing Analysis
10:56am - 11:10am PDT Monday, July 27 Mtg Room 202AB
EDA
EDA3. Timing Analysis and Optimization
Research Manuscript
Coordinated Clip-Wise Gradient Scheduling for Full-Chip ILT via Policy Learning
2:34pm - 2:47pm PDT Tuesday, July 28 Mtg Room 202AB
EDA
EDA8. Design for Manufacturability and Reliability
Research Manuscript
DR. OPC: Differentiable Rasterization for Advanced Optical Proximity Correction
1:42pm - 1:55pm PDT Tuesday, July 28 Mtg Room 202AB
EDA
EDA8. Design for Manufacturability and Reliability
Research Manuscript
Diffsp: Differentiable Sequence Pair-Based Analog Placement
4:30pm - 4:42pm PDT Wednesday, July 29 Mtg Room 101B
EDA
EDA6. Analog CAD, Simulation, Verification and Test
Research Manuscript
BSPDN-Elite: A Comprehensive Framework for Optimizing Timing, Power and Routing Resources in BSPDN Designs
2:08pm - 2:21pm PDT Monday, July 27 Mtg Room 201B
Chiplet
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package
Research Manuscript
Flexicts: CPPR-Aware 3D Clock Tree Synthesis for Face-to-Face Bonded ICs
1:30pm - 1:42pm PDT Monday, July 27 Mtg Room 201B
Chiplet
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package
Research Manuscript
HyPAS: A Hybrid Optimization Framework for Placement and Sizing Co-Optimization
4:06pm - 4:18pm PDT Wednesday, July 29 Mtg Room 202AB
EDA
EDA7-I. Physical Design and Verification