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Shouyi Yin
Tsinghua University
Presentations
Research Manuscript
AMBER: A Unified Accelerator for Multi-Precision LLM Inference Exploiting Bit-Level Redundancy and Reconfigurability
11:36am - 11:50am PDT Monday, July 27 Mtg Room 101B
AI
AI4-I. AI/ML Architecture Design
Research Manuscript
Hiband: A Hierarchical Bandwidth-Aware HB-DRAM Accelerator with Array-Level Co-Execution and Reconfigurable NoC for LLM Inference
11:54am - 12:06pm PDT Tuesday, July 28 Mtg Room 101A
AI
AI4-II. AI/ML Architecture Design
Research Manuscript
WSC-Cost: An Accurate Cost Modeling Framework for Wafer-Scale Chips
2:34pm - 2:47pm PDT Tuesday, July 28 Mtg Room 201B
Chiplet
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package