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Ehsan Degan
IBM Research
Presentations
Engineering Presentation
Graph Isomorphism for Explainable Transistor-Level Circuit Comparison
2:00pm - 2:15pm PDT Tuesday, July 28 Seaside RM 7
Design
EDA
Research Manuscript
StepPRM-RTL: Stepwise Process-Reward Guided LLM Fine-Tuning for Enhanced RTL Synthesis
4:30pm - 4:42pm PDT Monday, July 27 Mtg Room 101A
AI
AI1. AI/ML Frontiers for Hardware Design
Engineering Presentation
BIMEM-RAG: Reinforced Dual Memory Retrieval with Bidirectional Reasoning for RTL Synthesis and Summarization
11:00am - 11:15am PDT Tuesday, July 28 Seaside Ballroom A
AI
Design
EDA
Engineering Poster Gladiator
Cost-Based Partial Subgraph Matching for Circuit Pattern Recognition
5:22pm - 5:30pm PDT Monday, July 27 DAC Pavilion, Exhibit Floor
AI
Chiplet
Design
EDA
Quantum
Security
Systems