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Rongmei Chen
Peking University
Presentations
Research Manuscript
BSPDN-Elite: A Comprehensive Framework for Optimizing Timing, Power and Routing Resources in BSPDN Designs
2:08pm - 2:21pm PDT Monday, July 27 Mtg Room 201B
Chiplet
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package
Research Manuscript
Design Technology Co-Optimization for Network on Chip in High Performance CPUs at 3nm Node Using Monolithic 3D and Backside Interconnect Technologies
11:50am - 12:03pm PDT Monday, July 27 Mtg Room 202C
Design
DES5. Emerging Device and Interconnect Technologies
Research Manuscript
Flexicts: CPPR-Aware 3D Clock Tree Synthesis for Face-to-Face Bonded ICs
1:30pm - 1:42pm PDT Monday, July 27 Mtg Room 201B
Chiplet
EDA
EDA1. Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package