Presentation
Trace and Chase: Empowering LLMs to Identify the Root Cause of Test Failures in RISC-V SoCs via Textualized Waveform
DescriptionIdentifying the root causes of test failures in hardware designs constitutes a significant time bottleneck during the RISC-V SoC verification. Existing fault localization solutions solely yield unverifiable locations without the causality between faults and failures, and suffer from the impractical oracle requirements and unawareness of dynamic behavior. We propose the LLM-based root cause analysis framework WaveAce targeting RISC-V SoCs. Leveraging texualized waveform, LLMs can perform substantiated reasoning over code and signals. Our evaluation across single-file defect benchmark and the OpenTitan SoC demonstrates that WaveAce outperforms or matches baseline in 79% cases and succeeds in locating five realistic bugs at scale.
Event Type
Work in Progress
TimeMonday, July 276:50pm - 6:51pm PDT
LocationExhibit Hall