Presentation
Late Breaking Results: A Resource-Constrained Co-Design Framework for Enabling Heterogeneous Quantum Chiplet Ensembles via Circuit Cutting
DescriptionNear-term (NISQ) quantum processors are limited in qubit count, connectivity, and coherence, which constrains the size of quantum neural networks (QNNs) that can run monolithically on a single device. We propose a heterogeneous chiplet \emph{ensemble} architecture that targets a realistic setting with access to many small devices but no coherent interconnect: we assign one chiplet per model and use intra-model circuit cutting to decompose each logical QNN into resource-feasible subcircuits. Cross-chip quantum dependencies are replaced by classical stitching and ensemble aggregation, converting device heterogeneity into predictive diversity while avoiding coherent inter-chip communication. We further develop a resource-constrained co-design flow that jointly selects cut locations, chiplet/model assignment, and sampling budgets under qubit and noise constraints. Across MNIST, Fashion-MNIST, and Digits, our framework scales to larger logical models under strict per-device limits and yields consistent accuracy improvements (up to 3-8%) in both ideal simulation and noise-calibrated backends, motivating new CAD-style challenges in partitioning, mapping, and sampling-aware cost modeling for quantum chiplet systems.
Event Type
Work in Progress
TimeMonday, July 276:10pm - 6:10pm PDT
LocationExhibit Hall