Presentation
Voyager: An End-to-End Framework for Design-Space Exploration and Generation of DNN Accelerators
DescriptionWhile deep neural networks (DNNs) have achieved state-of-the-art performance in fields from computer vision to natural language processing, efficiently running these computationally demanding models requires specialized hardware accelerators. However, designing these accelerators is a time-consuming, labor-intensive process that does not scale well across multiple design points. While prior efforts have sought to automate DNN accelerator generation, they typically offer limited parameterization, cannot produce high-performance, tapeout-ready designs, provide limited support for multiple datatypes and quantization schemes, and lack an integrated, end-to-end software compiler.
This work proposes Voyager, a high-level synthesis (HLS)-based framework for rapid design space exploration and generation of DNN accelerators. Voyager overcomes the limitations of prior work by offering extensive configurability across technology nodes, clock frequencies, and scales, with customizable parameters such as number of processing elements, on-chip buffer sizes, and external memory bandwidth. Voyager supports a much wider variety of datatypes and quantization schemes versus prior work, including both built-in arbitrary-length floating-point, posit and integer formats, as well as user-defined custom formats with both per-tensor scaling and microscaling quantization. Voyager's PyTorch-based compiler efficiently maps neural networks end-to-end on the generated hardware, with support for quantization, operation fusion, and tiling.
We evaluate Voyager on state-of-the-art vision and language models. Voyager enables fast design-space exploration with full-dataset accuracy evaluation for different datatypes and quantization schemes. Generated designs achieve a high utilization across models and scales, up to 99.8%, and outperform prior generators with up to 61% lower latency and 56% lower area. Compared to hand-crafted accelerators, Voyager achieves comparable performance, while offering much greater automation in design and workload mapping.
This work proposes Voyager, a high-level synthesis (HLS)-based framework for rapid design space exploration and generation of DNN accelerators. Voyager overcomes the limitations of prior work by offering extensive configurability across technology nodes, clock frequencies, and scales, with customizable parameters such as number of processing elements, on-chip buffer sizes, and external memory bandwidth. Voyager supports a much wider variety of datatypes and quantization schemes versus prior work, including both built-in arbitrary-length floating-point, posit and integer formats, as well as user-defined custom formats with both per-tensor scaling and microscaling quantization. Voyager's PyTorch-based compiler efficiently maps neural networks end-to-end on the generated hardware, with support for quantization, operation fusion, and tiling.
We evaluate Voyager on state-of-the-art vision and language models. Voyager enables fast design-space exploration with full-dataset accuracy evaluation for different datatypes and quantization schemes. Generated designs achieve a high utilization across models and scales, up to 99.8%, and outperform prior generators with up to 61% lower latency and 56% lower area. Compared to hand-crafted accelerators, Voyager achieves comparable performance, while offering much greater automation in design and workload mapping.
Event Type
Research Manuscript
TimeWednesday, July 2910:43am - 10:56am PDT
LocationMtg Room 201B