Presentation
COM-BNN: A Configurable Low Power MRAM-Based Computing-in-Memory Accelerator for Binary Convolutional Computations
DescriptionIn resource-constrained tiny edge devices like MCUs, deploying data/compute-intensive AI like CNNs is challenging. Compute-in-Memory (CIM) and Binary Neural Networks (BNN) offer promising solutions by reducing memory access and simplifying computations. We propose RES-BNN, a lightweight, reconfigurable accelerator integrating MRAM-based CIM with serial BNN computation. It introduces a temporal reconfigurable input mechanism and an Integrate-and-Fire adder for serial MAC operations, plus an Exact Result Inferring method for efficient binary convolutional computations. RES-BNN achieves up to 85% energy and 83% power reduction over ADC-based CIM baselines, and enables dynamic latency-power tradeoffs, dropping power to 0.03% in serial mode for edge adaptability.
Event Type
Research Manuscript
TimeWednesday, July 295:06pm - 5:18pm PDT
LocationMtg Room 203C