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Are They All Safe? Practical Fault Injection Attacks on FPGA Logic Synthesis Tools
SessionShields Up: Post-Quantum Hardware, Confidential Computing, and Silicon-Level Resilience
DescriptionFPGAs are widely deployed in critical systems, but flaws in EDA toolchains can enable malicious HDL injection, leading to severe hardware vulnerabilities. We propose DefVul-Risk, an automated framework for assessing fault-injection risks in FPGA synthesis tools. It constructs a defect knowledge base, generates triggerable vulnerability samples via large language models, and fine-tunes risk-assessment models to prioritize high-risk defects. DefVul-Risk enhances toolchain security evaluation and vulnerability remediation efficiency. We submitted 26 CVE reports, with 9 officially confirmed.
Authors
Jiaxin Li
Dalian Maritime University
Shikai Guo
Dalian Maritime University
Zhihao Xu
Southeast University
Qian Ma
Dalian Maritime University
Xiaochen Li
Dalian University of Technology
He Jiang
Dalian University of Technology
Event Type
Research Manuscript
TimeWednesday, July 294:30pm - 4:42pm PDT
LocationMtg Room 202C
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