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Toward True-3D Timing-Driven Analytical Global Placement for Mixed-Size Face-to-Face 3D ICs

SessionPlacing the Future Beyond Cells: From Transistors to 3D Integration

DescriptionFace-to-face (F2F) three-dimensional integrated circuit (3D IC) design leverages advanced vertical interconnect technologies, such as hybrid bonding and micro-bump soldering, to vertically stack dies and preserve transistor-density scaling beyond Moore's law. Despite significant progress in 3D physical design methodologies, explicit timing optimization within 3D analytical global placement (GP) remains largely unexplored. In this work, we present the first timing-driven analytical GP framework that moves toward true-3D optimization for mixed-size F2F 3D ICs. We propose a comprehensive timing-driven net weighting formulation that integrates drive-strength-based cell delay, L-shaped RC-based net delay, and static timing analysis (STA)-based incremental timing criticality into the analytical GP model, serving as a backbone for timing optimization and flexibly adapts to both true-3D and multi-die 2D GP environments. To steer macros away from central congestion and provide an effective 3D initialization, we introduce a macro-boundary-aware true-3D initial placement approach that models macro-to-boundary interactions using a differentiable function. Then, we develop the first timing-driven mixed-size true-3D GP algorithm that jointly optimizes standard cells and macros within a unified 3D design space, enabling cross-die timing refinement and improving 3D timing closure. After die partitioning based on true-3D GP results, we further introduce a timing-driven multi-die 2D GP guided by 3D-aware STA, in which cross-die RC-trees are reconstructed to enable realistic 3D parasitic estimation for STA. Experimental results on OpenROAD benchmark suites demonstrate that, compared with existing open-source placement flows and a wirelength-driven 3D GP baseline, our timing-driven 3D GP framework achieves at least 33.2% and 43.2% average improvements in total negative slack (TNS) and worst negative slack (WNS), respectively.

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