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Rectilinear Soft Module Floorplanning via Differentiable Polygon Shaping Model and Flow-Based Legalization

SessionStructuring the Blueprint: Scalable Partitioning and Early-Stage Floorplanning

DescriptionFixed-outline floorplanning remains a critical challenge in VLSI physical design, particularly for modern System-on-Chips (SoCs) that employ rectilinear soft modules to maximize area utilization and reduce wirelength. Existing methods adopt an incremental optimization strategy, introducing rectilinear shape considerations only after obtaining an initial rectangular solution. These approaches restrict module flexibility in early stages, limit the solution space, and degrade the final Quality of Results (QoR).We propose a unified floorplanning framework that, for the first time, seamlessly integrates the optimization of rectilinear soft module into both global floorplanning and legalization stages.To address the computational challenges posed by rectilinear polygons, we introduce a differentiable polygon shaping model that represents and dynamically optimizes module shapes using a structured set of continuous variables during global floorplanning.We further design an augmented Lagrangian method to efficiently manage complex constraints with theoretical convergence guarantees, enhancing solution quality and stability. During legalization, we ingeniously model the problem as a minimum-cost flow formulation, where the objective is to minimize the total displacement, thereby ensuring a legal and high-quality final floorplan. Experimental results on GSRC and MCNC benchmarks demonstrate that our method achieves better solution quality, reducing half-perimeter wirelength by an average of 4% and up to 14% compared with state-of-the-art floorplanners, while maintaining competitive runtime performance.

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