Presentation
G-Matcher: GPU-Accelerated Multi-Level, Multi-Stage Framework for Large-Scale Layout Pattern Matching
DescriptionPattern matching has become one of the most predominant industrial solutions in IC design-to-manufacturing flow, with broad applications in layout verification, hotspot detection and Optical Proximity Correction (OPC). However, conventional CPU-based approaches, which rely on rule-based extraction, suffer from excessive false matches and high runtime overhead. These inefficiencies create bottlenecks in both verification and manufacturing workflows at advanced nodes. To address these limitations, we introduce the first fully GPU-accelerated pattern matching framework G-Matcher, with a novel multi-stage, multi-level architecture. Our GPU-oriented development exploits massive parallelism to process ultra large scale layout data. The multi-stage pipeline filters false matches, while the multi-level paradigm utilizes specialized pattern and layout representations to accelerate the search. On industrial datasets, our framework demonstrates a 407× speedup over the 64-thread commercial tool Calibre. On public benchmarks, it achieves 7.1× speedup over a state-of-the-art CPU implementation. Importantly, G-Matcher maintains 100% matching accuracy with zero false matches across all evaluations.
Event Type
Research Manuscript
TimeTuesday, July 283:42pm - 3:54pm PDT
LocationMtg Room 202AB