Presentation
DCTS: Differentiable Clock Tree Synthesis Based on Probabilistic Graphical Model
DescriptionClock Tree Synthesis (CTS) constitutes a complex, discrete, and combinatorial multi-objective optimization (MOO) problem, which is typically fragmented into sequential steps, including clustering, topology generation, and buffering in traditional flows, leading to suboptimal results due to local optima. Despite significant potential in MOO, differentiable methods are inherently limited to represent dynamic topological adjustments during CTS. To solve this, We propose an end-to-end differentiable CTS framework, DCTS, based on Probabilistic Graphical Model (PGM) to re-parameterize the discrete topological search into a continuous gradient-based problem, enabling co-optimization of clock tree topology and buffer sizing within a global design space. The proposed DCTS was evaluated on ISCAS'89 and OpenCores benchmark circuits under the ASAP7 technology node. Experimental results show that it achieves competitive power, performance, and area (PPA) metrics against a leading commercial tool, along with a 2.78$\times$ speedup on large-scale circuits. Furthermore, when compared to state-of-the-art academic solutions, DCTS guarantees minimum improvements of 20\% in delay, 17\% in skew, 1\% in power, and 17\% in area, while also achieving a minimum speedup of 1.98$\times$ on large-scale designs.
Event Type
Research Manuscript
TimeTuesday, July 284:18pm - 4:30pm PDT
LocationMtg Room 202AB