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Hunting RTL Glitches Before They Burn Power: A Practical RTL Success Story
DescriptionGlitch power is the next major optimization frontier. It could cost up to 25% of total dynamic power. It is too late and hard to do algorithms or architecture change in P&R stage. So, it is important to identify such risk and optimize the design in RTL stage.
In this paper, we propose a new data driven glitch methodology to analyze glitch power in RTL stage. The delay aware glitch propagation is faster and easy to setup compared with other methodology. With the glitch source report the designers can identify the highest-impact source and optimize their design to minimize the glitch power.