Presentation
A Hierarchical and Scalable Power Supply Network (PSN) Analysis Framework for FCBGA Packages in High-Power AI Applications
DescriptionAs AI, machine learning, and cloud workloads scale, interconnects must deliver higher bandwidth and lower latency without compromising system-level power integrity and PDN robustness. Massive parallel compute leads to high transient current demand, fast di/dt switching, and increased simultaneous switching noise, causing traditional PDN assumptions to break down at the system level.
A scalable system-level PI simulation flow is key to balancing accuracy and turnaround time for large, high-performance product designs under aggressive go-to-market timelines. This work presents a virtual validation framework for system-level power integrity sign-off analysis, including die, package, and PCB. It enables engineers to identify anomalously high impedance responses in the system; excessive transient voltage drops and elevated current ripples at each interface (per bump) of the system.
This approach helps to correct the design before tape-out, helping to avoid costly redesign cycles and potential product failures.
A scalable system-level PI simulation flow is key to balancing accuracy and turnaround time for large, high-performance product designs under aggressive go-to-market timelines. This work presents a virtual validation framework for system-level power integrity sign-off analysis, including die, package, and PCB. It enables engineers to identify anomalously high impedance responses in the system; excessive transient voltage drops and elevated current ripples at each interface (per bump) of the system.
This approach helps to correct the design before tape-out, helping to avoid costly redesign cycles and potential product failures.
Event Type
Engineering Presentation
TimeMonday, July 274:00pm - 4:15pm PDT
LocationSeaside Ballroom A